tion based on mesh analysis can be combined with a GMRES-style iterative matrix solution technique to make a reasonably fast 3-D frequency dependent inductance and resistance extraction algorithm. Unfortunately, both the computation time and memory re- quired for that approach grow faster than n 2, where n is the number of volume-filaments. In this paper, we show that it is possible to use multipole-acceleration to reduce both required memory and computation time to nearly order n. Results from examples are given to demonstrate that the multipole acceleration can reduce required computation time and memory by more than an order of magnitude for realistic packaging problems.

In this paper we present a new approach to threedimensional capacitance extraction based on a precorrected FFT scheme. The approach is compared to the now commonly used multipole-accelerated algorithms for a variety of structures, and the new method is shown to have substantial performance and memory advantages.

Industry trends aimed at integrating higher levels of circuit functionality have triggered a proliferation of mixed analog-digital systems. Magnified noise coupling through the common chip substrate has made the design and verification of such systems an increasingly difficult task. In this paper we present a fast eigendecomposition technique that accelerates operator application in BEM methods and avoids the dense-matrix storage while at the same time taking all of the substrate boundary effects into account explicitly. This technique can be used for accurate and efficient modeling of substrate coupling effects in mixed-signal integrated circuits.

As VLSI circuit speeds have increased, reliable chip and system design can no longer be performed without accurate threedimensional interconnect models. In this paper, we describe an integral equation approach to modeling the impedance of interconnect structures accounting for both the charge accumulation on the surface of conductors and the current traveling in their interior. Our formulation, based on a combination of nodal and mesh analysis, has the required properties to be combined with Model Order Reduction techniques to generate accurate and guaranteed passive low order interconnect models for efficient inclusion in standard circuit simulators. Furthermore, the formulation is shown to be more flexible and efficient than previously reported methods.

In this paper we describe a computationally efficient approach to generating reduced-order models from PEEC-based three-dimensional electromagnetic analysis programs. It is shown that a recycled multipole accelerated approach applied to recent model order reduction techniques requires nearly two orders of magnitude fewer floating point operations than direct techniques thus allowing the analysis of larger, more complex three-dimensional geometries.

This paper describes an eJficent implementation of a Galerkin based multipole-accelerated boundary- element method for 3-D capacitance extraction of conductors in an arbitrary piecewise-constant dielectric medium. Results are presented to demonstrate that the Galerkin method is substantially more accurate than the commonly used collocation scheme for problems with dielectric interfaces. In addition, it is shown experimentally that for a given discretization, a careful implementation of the Galerkin method in a multipole-accelerated program is only slightly more computationally expensive than the collocation method.

Shrinking feature sizes and increasing speeds of operation make interconnect-related effects very relevant for current circuit verification methodologies. Reliable and accurate system verification requires the full analysis of circuits together with the environment that surrounds them, including the common substrate, the packaging structures, and perhaps even board information. In this paper we discuss circuit-level simulation algorithms that enable the analysis of the impact of strongly coupled interconnect structures on nonlinear circuit operation, so as to allow reliable and accurate system verification. 1

In order to optimize high-speed systems, designers need tools that automatically generate reduced-order SPICE compatible models from geometric descriptions of interconnect and packaging. In this paper, we consider structures small compared to a wavelength, and use a discretized integral formulation combined with an Arnoldi-based model-order reduction strategy to compute efficiently accurate reduced-order models from three-dimensional (3-D) structures. Several issues are addressed including: 1) formulation to insure passivity in the reduced-order models; 2) efficient reduction using preconditioned inner-loop iterative methods; 3) expansion about multiple s-domain points.

. In this paper techniques are presented for preconditioning equations generated by discretizing constrained vector integral equations associated with magnetoquasistatic analysis. Standard preconditioning approaches often fail on these problems. We present a specialized preconditioning technique and prove convergence bounds independent of the constraint equations and electromagnetic excitation frequency. Computational results from analyzing several electronic packaging examples are given to demonstrate that the new preconditioning approach can sometimes reduce the number of GMRES iterations by more than an order of magnitude. 1. Introduction. The recently developed multipole-accelerated iterative methods for solving potential integral equations have renewed interest in using discretized integral formulations for the numerical solution of geometrically complicated three-dimensional problems [1, 2]. As multipole-based approaches use implicit matrix representations which can not be easi...

More aggressive design practices have created renewed interest in techniques for analyzing substrate coupling problems. Most previous work has focused primarily on faster techniques for extracting coupling resistances, but has offered little help for reducing the resulting resistance matrix, whose number of nonzero entries grows quadratically with the number of contacts. Wavelet-like methods have been applied to sparsifying the resistance matrix representing the substrate coupling, but the accuracy of the method is very sensitive to the particulars of the contact layout. In this paper we show that for the substrate problem it is possible to improve considerably on the wavelet-like methods by making use of the algorithmic structure common to the fast multipole and wavelet-like algorithms, but making judicious use of low-rank approximations. The approach, motivated by the hierarchical SVD algorithm, can achieve more than an order of magnitude better accuracy for commensurate sparsity, or can achieve much better sparsity at commensurate accuracy, when compared to the wavelet-like algorithm. 1.