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Compacting Garbage Collection with Ambiguous Roots
, 1988
"... This paper introduces a copying garbage collection algorithm which is able to compact most of the accessible storage in the heap without having an explicitly defined set of pointers that contain the roots of all accessible storage. Using "hints" found in the processor's registers and stack, the algo ..."
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Cited by 98 (3 self)
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This paper introduces a copying garbage collection algorithm which is able to compact most of the accessible storage in the heap without having an explicitly defined set of pointers that contain the roots of all accessible storage. Using "hints" found in the processor's registers and stack, the algorithm is able to divide heap allocated objects into two groups: those that might be referenced by a pointer in the stack or registers, and those that are not. The objects which might be referenced are left in place, and the other objects are copied into a more compact representation. A Lisp compiler and runtime system which uses such a collector need not have complete control of the processor in order to force a certain discipline on the stack and registers. A Scheme implementation has been done for the Digital WRL Titan processor which uses a garbage collector based on this "mostly copying" algorithm. Like other languages for the Titan, it uses the Mahler intermediate language as its targe...
SCHEME->C: a Portable Scheme-to-C Compiler
- WRL Research Report 89/1
, 1989
"... One way to make compilers portable is to have them compile to an intermediate language which is implemented on multiple architectures. By using C as the intermediate language and compiling the LISP dialect Scheme to it, it might be possible to achieve the following benefits. First, since C is the li ..."
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Cited by 61 (3 self)
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One way to make compilers portable is to have them compile to an intermediate language which is implemented on multiple architectures. By using C as the intermediate language and compiling the LISP dialect Scheme to it, it might be possible to achieve the following benefits. First, since C is the lingua franca of workstations the resulting system should be very portable. Second, it should allow Scheme programs to interact with those written in other languages. Finally, it should simplify the compiler as it need not repeat the optimization capability available in the C compiler. However, there might be some unacceptable costs associated with this. First, there might not be a clean translation from Scheme to C, so that the implementation is not quite Scheme. Second, the two-stage translation might result in inefficient code. Finally, the generated code might be so stylized that it is neither portable nor compatible with other programming languages. To investigate these issues, such a compiler and run-time system were constructed at Digital Equipment Corporation's Western Reaearch Laboratory. Experience with the system shows, that there is a translation of Scheme to C, that has good performance, and is portable.
Semantically-Sensitive Macroprocessing
, 1989
"... Conventional procedure and type definition mechanisms are not sufficiently powerful to express many programming abstractions that can be captured by syntactic transformations. Unfortunately, conventional macroprocessing is oblivious to the semantics of the base language, resulting in scoping anom ..."
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Cited by 15 (0 self)
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Conventional procedure and type definition mechanisms are not sufficiently powerful to express many programming abstractions that can be captured by syntactic transformations. Unfortunately, conventional macroprocessing is oblivious to the semantics of the base language, resulting in scoping anomalies, poor handling of static semantic errors, and an inability to perform transformations dependent on semantic attributes of the manipulated program. We introduce a new mechanism, semantic macros, which permit such transformations a significant level of access to the static semantic properties of the program fragments they manipulate. In this way, new static semantic processing, including compilation of embedded languages with a rich static semantics of their own, can be incorporated into user-defined language extensions. A proof-of-concept language, XL, is described which embodies this mechanism. Sponsored by the Defense Advanced Research Projects Agency (DoD), monitored by Spac...
The Verification of a Bit-Slice ALU
- Workshop on Hardware Speci Veri and Synthesis: Mathematical Aspects, Springer LNCS 408
, 1989
"... Government. The verification of a bit-slice ALU has been accomplished using a mechanical theorem prover. This ALU has an n-bit design specification, which has been verified to implement its top-level specification. The ALU and top-level specifications were written in the Boyer-Moore logic. The verif ..."
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Cited by 6 (2 self)
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Government. The verification of a bit-slice ALU has been accomplished using a mechanical theorem prover. This ALU has an n-bit design specification, which has been verified to implement its top-level specification. The ALU and top-level specifications were written in the Boyer-Moore logic. The verification was carried out with the aid of Boyer-Moore theorem prover in a hierarchical fashion. 1 1.
The Formalization of a Simple Hardware Description Language
- Applied Formal Methods For Correct VLSI Design
, 1989
"... . A hierarchical, occurrence-oriented, combinational hardware description language has been formalized using the Boyer-Moore logic. Instead of representing circuits as formulas of a particular logic, combinational circuits are represented by list constants in the Boyer-Moore logic. A good-circuit pr ..."
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Cited by 3 (0 self)
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. A hierarchical, occurrence-oriented, combinational hardware description language has been formalized using the Boyer-Moore logic. Instead of representing circuits as formulas of a particular logic, combinational circuits are represented by list constants in the Boyer-Moore logic. A good-circuit predicate recognizes well-formed circuit descriptions; an interpreter provides the semantics of the language. This approach allows the direct verification of circuit specifications, as well as allowing the verification of circuit generating functions. A circuit generating function for a family of ALUs has been verified using these techniques. 1. Introduction The formalization of a hierarchical, occurrence-oriented, combinational hardware description language (HDL) has been employed to prove the correctness of functions which generate circuits. This formalization was carried out with the Boyer-Moore logic and its associated mechanical theorem prover [Boyer & Moore 88]. HDL statements are forma...
Frigate: An Object-Oriented File System
, 1998
"... It is impossible to design and implement file systems for all possible uses. Only a few general purpose services can typically be included in an operating system. However, it is highly desirable to be able to modify or extend file systems within an operating system. Modifying the operating system ..."
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Cited by 3 (0 self)
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It is impossible to design and implement file systems for all possible uses. Only a few general purpose services can typically be included in an operating system. However, it is highly desirable to be able to modify or extend file systems within an operating system. Modifying the operating system for any purpose has traditionally been a difficult, if not impossible, task. Micro-kernel architectures, Streams, vnodes, loadable device drivers, and various "file system in a server" schemes have all attempted to add some measure of extensibility. We propose a new file system extensibility approach based on Frigate, an object-oriented file system. Frigate provides a modular, extensible file system framework that allows new extensions to be "plugged-in" on the f...
SILO: Integrating Logic in Objects for Knowledge Representation and Reasoning
- International Journal on AI Tools
, 1996
"... There have been a large number of systems that integrate logic and objects (frames or classes) for knowledge representation and reasoning. Most of those systems give preeminence to logic and their objects lack the structure of frames. These choices imply a number of disadvantages, as the inability t ..."
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Cited by 2 (2 self)
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There have been a large number of systems that integrate logic and objects (frames or classes) for knowledge representation and reasoning. Most of those systems give preeminence to logic and their objects lack the structure of frames. These choices imply a number of disadvantages, as the inability to represent exceptions and perform default reasoning, and the reduction in the naturalness of representation. In this paper, aspects of knowledge representation and reasoning in SILO, a system integrating logic in objects, are presented. SILO gives pre-eminence to objects. A SILO object comprises elements from both frames and classes. A kind of many-sorted logic is used to express object internal knowledge. Message passing, alongside inheritance, plays a significant role in the reasoning process. Control knowledge, concerning both deduction and inheritance, is separately and explicitly represented via definitions of certain functions, called meta-functions.
Generalization in the presence of free variables: A mechanically-checked proof for one algorithm
- Journal of Automated Reasoning
, 1991
"... interpreted as representing the official policies, either expressed ..."
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Cited by 2 (1 self)
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interpreted as representing the official policies, either expressed
A Dataflow Compiler Substrate
, 1991
"... ion. Section 3.2 defcompiler Utilities for defining and running Compilers. Chapter 2 external-symbols Implements External Symbols Abstraction. Chapter 5 file CIOBL read/write functions for Dataflow Graphs. frame Implements Frames (except for wiring functions). Section 3.2.4 parse-tree Impl ..."
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Cited by 1 (0 self)
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ion. Section 3.2 defcompiler Utilities for defining and running Compilers. Chapter 2 external-symbols Implements External Symbols Abstraction. Chapter 5 file CIOBL read/write functions for Dataflow Graphs. frame Implements Frames (except for wiring functions). Section 3.2.4 parse-tree Implements Lexical Tokens and Parse Tree manipulations. Section 3.1 performance-meters Implements Performance Metering. Section 7.2 storage Implements explicit management of adjustable vectors with fill pointers. syntax-directed Implements Grammars and Parse Tree Attribute management. Section 4.1 and Section 4.2 test Some random test functions for DFCS. wiring Implements wiring functions to and from Instruction /Frame Sinks and Sources. Section 3.2 write-verbose-dataflow-graph A utility to view a dataflow graph in a tabular form. Section 7.4 Figure A.1: List of files for Dataflow Compiler Substrate System Appendix B Acknowledgments Every aspect of this compiler is based to some degree...

