Results 1  10
of
16
preceding paper
"... journal homepage: www.elsevier.com/locate/automatica ..."
Abstract

Cited by 11 (1 self)
 Add to MetaCart
(Show Context)
journal homepage: www.elsevier.com/locate/automatica
Fast Linear Model Predictive Control via Custom Integrated Circuit Architecture
"... This paper addresses the implementation of linear model predictive control (MPC) at millisecond range, or faster, sampling rates. This is achieved by designing a custom integrated circuit architecture that is specifically targeted to the MPC problem. As opposed to the more usual approach using a g ..."
Abstract

Cited by 11 (0 self)
 Add to MetaCart
This paper addresses the implementation of linear model predictive control (MPC) at millisecond range, or faster, sampling rates. This is achieved by designing a custom integrated circuit architecture that is specifically targeted to the MPC problem. As opposed to the more usual approach using a generic serial architecture processor, the design here is implemented using a field programmable gate array (FPGA) and employs parallelism, pipelining and specialized numerical formats. The performance of this approach is profiled via the control of a 14th order resonant structure with 12 sample prediction horizon at 200µs sampling rate. The results indicate that no more than 30µs are required to compute the control action. A feasibility study indicates that the design can also be implemented in 130nm CMOS technology, with a core area of 2.5mm 2. These results illustrate the feasibility of MPC for reasonably complex systems, using relatively cheap, small, and lowpower computing hardware.
FPGA Implementation of an InteriorPoint Solution for Linear Model Predictive Control ⋆
"... Abstract: The work here is directed at examining a model predictive control (MPC) implementation that takes advantage of recent advances in the availability of high performance computing platforms at modest cost. The focus here is on the potential for developing custom architecture solutions on fiel ..."
Abstract

Cited by 5 (0 self)
 Add to MetaCart
Abstract: The work here is directed at examining a model predictive control (MPC) implementation that takes advantage of recent advances in the availability of high performance computing platforms at modest cost. The focus here is on the potential for developing custom architecture solutions on field programmable gate array (FPGA) platforms. This is illustrated by demonstrating the solution of a disturbance rejection problem on a real 14’th order lightly damped resonant system at 200µs sampling rate, using only 30µs to compute the control action.
Parallel Move Blocking Model Predictive Control
"... Abstract — This paper proposes the use of parallel computing architectures (multicore, FPGA, GPU) to implement a parallel move blocking Model Predictive Control (MPC) algorithm where multiple, but smaller optimization problems are solved simultaneously. Since these problems are solved in parallel, ..."
Abstract

Cited by 3 (1 self)
 Add to MetaCart
(Show Context)
Abstract — This paper proposes the use of parallel computing architectures (multicore, FPGA, GPU) to implement a parallel move blocking Model Predictive Control (MPC) algorithm where multiple, but smaller optimization problems are solved simultaneously. Since these problems are solved in parallel, the computational delay is reduced when compared to standard MPC. This allows for faster sampling that can outperform, in terms of closedloop cost, a standard MPC formulation. Feasibility and stability are guaranteed by an appropriate selection of socalled blocking matrices. I.
Preconditioners for inexact interior point methods for predictive control
 In Proceedings of the 2010 American Control Conference
, 2010
"... ..."
(Show Context)
MPC Related Computational Capabilities of ARMv7A Processors
"... Abstract — In recent years, the mass market of mobile devices has pushed the demand for increasingly fast but cheap processors. ARM, the world leader in this sector, has developed the CortexA series of processors with focus on computationally intensive applications. If properly programmed, these p ..."
Abstract

Cited by 1 (1 self)
 Add to MetaCart
(Show Context)
Abstract — In recent years, the mass market of mobile devices has pushed the demand for increasingly fast but cheap processors. ARM, the world leader in this sector, has developed the CortexA series of processors with focus on computationally intensive applications. If properly programmed, these processors are powerful enough to solve the complex optimization problems arising in MPC in realtime, while keeping the traditional lowcost and lowpower consumption. This makes these processors ideal candidates for use in embedded MPC. In this paper, we investigate the floatingpoint capabilities of Cortex A7, A9 and A15 and show how to exploit the unique features of each processor to obtain the best performance, in the context of a novel implementation method for the linearalgebra routines used in MPC solvers. This method adapts highperformance computing techniques to the needs of embedded MPC. In particular, we investigate the performance of matrixmatrix and matrixvector multiplications, which are the backbones of second and firstorder methods for convex optimization. Finally, we test the performance of MPC solvers implemented using these optimized linearalgebra routines. I.
An O (logN) Parallel Algorithm for Newton Step Computation in Model Predictive Control
"... Abstract The use of Model Predictive Control in industry is steadily increasing as more complicated problems can be addressed. Due to that online optimization is usually performed, the main bottleneck with Model Predictive Control is the relatively high computational complexity. Hence, a lot of res ..."
Abstract

Cited by 1 (1 self)
 Add to MetaCart
(Show Context)
Abstract The use of Model Predictive Control in industry is steadily increasing as more complicated problems can be addressed. Due to that online optimization is usually performed, the main bottleneck with Model Predictive Control is the relatively high computational complexity. Hence, a lot of research has been performed to find efficient algorithms that solve the optimization problem. As parallelism is becoming more commonly used in hardware, the demand for efficient parallel solvers for Model Predictive Control has increased. In this paper, a tailored parallel algorithm that can adopt different levels of parallelism for solving the Newton step is presented. With sufficiently many processing units, it is capable of reducing the computational growth to logarithmic growth in the prediction horizon. Since the Newton step computation is where most computational effort is spent in both interiorpoint and activeset solvers, this new algorithm can significantly reduce the computational complexity of highly relevant solvers for Model Predictive Control.
unknown title
"... hierarchical timesplitting approach for solving finitetime optimal control problems ..."
Abstract
 Add to MetaCart
(Show Context)
hierarchical timesplitting approach for solving finitetime optimal control problems
Constrained LQR for LowPrecision Data Representation
"... Abstract Performing computations with a lowbit number representation results in a faster implementation that uses less silicon, hence allows an algorithm to be implemented in smaller and cheaper processors without loss of performance. We propose a novel formulation to efficiently exploit the low ( ..."
Abstract
 Add to MetaCart
(Show Context)
Abstract Performing computations with a lowbit number representation results in a faster implementation that uses less silicon, hence allows an algorithm to be implemented in smaller and cheaper processors without loss of performance. We propose a novel formulation to efficiently exploit the low (or nonstandard) precision number representation of some computer architectures when computing the solution to constrained LQR problems, such as those that arise in predictive control. The main idea is to include suitablydefined decision variables in the quadratic program, in addition to the states and the inputs, to allow for smaller roundoff errors in the solver. This enables one to trade off the number of bits used for data representation against speed and/or hardware resources, so that smaller numerical errors can be achieved for the same number of bits (same silicon area). Because of data dependencies, the algorithm complexity, in terms of computation time and hardware resources, does not necessarily increase despite the larger number of decision variables. Examples show that a 10fold reduction in hardware resources is possible compared to using double precision floating point, without loss of closedloop performance.