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...out the key, e.g., the data cache [36,43], instruction cache [1,2], floating-point multiplier [5], or branchprediction cache [3]. The strongest attacks in this class, first demonstrated only recently =-=[2,8]-=-, are referred to as asynchronous, meaning that they do not require the attacker to achieve precisely timed observations of the victim by actively triggering victim operations. These attacks leverage ...

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...nel attacks that rely on the timing difference between accessing cached and non-cached values. Cache side-channel attacks have been used in the past against RSA [1, 13], Elgamal [21], DSA [2] and AES =-=[9, 16, 20]-=-. With one notable exception all of these attacks rely on monopolising the cache by accessing enough data to force the victim’s data out of the cache. As most memory activity occurs in the L1 cache, a...

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... Statistical Timing Attack (Remote) SMT Pentium 4 with HT 220.0 Full 128-bit key Passive Time-driven [8] AES 2005 Statistical Timing Attack (Remote) UP Pentium III 227.5 Full 128-bit key Trace-driven =-=[14]-=- AES 2011 Asynchronous Probe UP Pentium 4 M 26.6 Full 128-bit key Trace-driven [29] AES 2007 Final Round Analysis UP Pentium III 24.3 Full 128-bit key Trace-driven [3] AES 2006 First/Second Round Anal...

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... lookup is a cache hit or miss, thereby learning partial information about the state of the cache. This partial information has been used for extracting cryptographic keys from implementations of AES =-=[12,22,35]-=-, RSA [37], and DSA [6]. In particular AES is vulnerable to such cache attacks, because most high-speed software implementations make heavy use of look-up tables. Cache attacks are the most effective ...

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...m on the system that is performing the cryptographic operation of interest. The attacker program monitors usage of a shared hardware component to learn information about the key, e.g., the data cache =-=[27, 25, 24, 31, 13]-=-, instruction cache [1, 2, 38], floating-point multiplier [5], or branch-prediction cache [4, 3]. Our work specifically aims at defending against accessdriven cache-based side-channel attacks in the c...

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...nant side channels in commercial clouds of any sort. Existing side-channel attacks mountable by one process on another running on the same OS, particularly those that leverage processor caches (e.g., =-=[28, 30, 25, 34, 14, 38]-=-), seem well suited to performing attacks across boundries between tenant instances1 in PaaS deployments. This is largely true in our experience, though directly leveraging these attacks in PaaS setti...

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...related with the number of cache hits and misses during execution. Time-based attacks are especially daunting because they can be carried out remotely over the network [7]. (2) In accessbased attacks =-=[39, 38, 23]-=- the adversary probes the cache state by timing its own accesses to memory. Accessbased attacks require that attacker and victim share the same hardware platform, which is common in the cloud and has ...

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...o far there has been little discussion about safe implementation of cryptosystems on cloud systems. For instance, implementation attacks on AES implementations, as proposed by Bernstein [8] and later =-=[9, 13]-=-, use the timing difference of cache accesses to recover the secret key. A more recent study by Gullasch et.al [13] applies Flush+Reload attack between AES memory accesses. The attack recovers the key...

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... following the work of Kocher [30] (see Section 8). Unfortunately, many of the techniques are not designed for IFC scenarios. For example, modifying an algorithm implementation, as in the case of AES =-=[9, 19]-=-, does not naturally generalize to arbitrary untrusted code. Similarly, flushing or disabling the cache when switching protection domains, as suggested in [8, 70], is prohibitively expensive in system...