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43
Synthesis of reversible circuits with minimal lines for large functions
 in ASP Design Automation Conf., 2012
"... Abstract — Reversible circuits are an emerging technology where all computations are performed in an invertible manner. Motivated by their promising applications, e.g. in the domain of quantum computation or in the lowpower design, the synthesis of such circuits has been intensely studied. However, ..."
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Cited by 16 (13 self)
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Abstract — Reversible circuits are an emerging technology where all computations are performed in an invertible manner. Motivated by their promising applications, e.g. in the domain of quantum computation or in the lowpower design, the synthesis of such circuits has been intensely studied. However, how to automatically realize reversible circuits with the minimal number of lines for large functions is an open research problem. In this paper, we propose a new synthesis approach which relies on concepts that are complementary to existing ones. While “conventional ” function representations have been applied for synthesis so far (such as truth tables, ESOPs, BDDs), we exploit Quantum Multiplevalued Decision Diagrams (QMDDs) for this purpose. An algorithm is presented that performs transformations on this datastructure eventually leading to the desired circuit. Experimental results show the novelty of the proposed approach through enabling automatic synthesis of large reversible functions with the minimal number of circuit lines. Furthermore, the quantum cost of the resulting circuits is reduced by 50 % on average compared to an existing stateoftheart synthesis method. I.
RevKit: A Toolkit for Reversible Circuit Design
"... Abstract—In recent years, research in the domain of reversible circuit design has attracted significant attention leading to many different approaches for e.g. synthesis, optimization, simulation, verification, and test. However, most of the resulting tools are not publicly available. In this paper, ..."
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Cited by 15 (10 self)
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Abstract—In recent years, research in the domain of reversible circuit design has attracted significant attention leading to many different approaches for e.g. synthesis, optimization, simulation, verification, and test. However, most of the resulting tools are not publicly available. In this paper, we introduce RevKit, an open source toolkit that aims to make recent developments in reversible circuit design accessible to other researchers. Therefore, a modular and extendable framework is provided which easily enables the addition of new methods and tools. RevKit already provides some of the existing approaches for synthesis, optimization, and verification functionality. I. INTRODUCTION AND BACKGROUND The development of computing machines has found great success in the last decades. Nowadays billions of components are built on a few square centimeters – and this increasing
SyReC: A programming language for synthesis of reversible circuits
 in Forum on Specification and Design Languages, 2010
"... Abstract—Reversible logic serves as a basis for emerging technologies like quantum computing and additionally has applications in lowpower design. In particular, since traditional technologies like CMOS are going to reach their limits in the near future, reversible logic has been established as a ..."
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Cited by 13 (10 self)
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Abstract—Reversible logic serves as a basis for emerging technologies like quantum computing and additionally has applications in lowpower design. In particular, since traditional technologies like CMOS are going to reach their limits in the near future, reversible logic has been established as a promising alternative. Thus, in the last years this area started to become intensely studied by researchers. In particular, how to efficiently synthesize complex reversible circuits is an important question. So far, only synthesis approaches are available that rely on Boolean function representations, like e.g. truth tables or decision diagrams. In this paper, we propose the programming language SyReC that allows to specify and afterwards to automatically synthesize reversible circuits. Using an existing programming language for reversible software design as basis, we introduce new concepts, operations, and restrictions allowing the specification of reversible hardware. Furthermore, a hierarchical approach is presented that automatically transforms the respective statements and operations of the new programming language into a reversible circuit. Experiments show that with the proposed method, complex circuits can be easily specified and synthesized while with previous approaches this often is not possible due to the limits caused by truth tables or decision diagrams. I.
Determining the minimal number of lines for large reversible circuits
 in Design, Automation and Test in Europe
, 2011
"... Abstract—Synthesis of reversible circuits is an active research area motivated by its applications e.g. in quantum computation or lowpower design. The number of used circuit lines is thereby a crucial criterion. In this paper, we introduce several methods (including a theoretical upper bound) for t ..."
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Cited by 11 (9 self)
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Abstract—Synthesis of reversible circuits is an active research area motivated by its applications e.g. in quantum computation or lowpower design. The number of used circuit lines is thereby a crucial criterion. In this paper, we introduce several methods (including a theoretical upper bound) for the efficient computation or at least approximation of the minimal number of lines needed to realize a given function in reversible logic. While the proposed exact approach requires a significant amount of runtime (exponential in the worst case), the heuristic methods lead to very precise approximations in very short runtime. Using this, it can be shown that current synthesis approaches for large functions are still far away from producing optimal circuits with respect to the number of lines. I.
Reducing Reversible Circuit Cost by Adding Lines
, 2010
"... Additional lines are required to implement an irreversible function as a reversible circuit. The emphasis, particularly in automated synthesis methods, has been on using the minimal number of additional lines. In this paper, we show that circuit cost reductions can be achieved by adding additional ..."
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Cited by 10 (5 self)
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Additional lines are required to implement an irreversible function as a reversible circuit. The emphasis, particularly in automated synthesis methods, has been on using the minimal number of additional lines. In this paper, we show that circuit cost reductions can be achieved by adding additional lines. We present an algorithm for line addition that can be targeted to reducing the quantum cost of a circuit or the transistor count for a CMOS implementation. Experimental results show that the cost reduction can be significant even if (1) only a small number of lines (even one) is added and (2) other circuit optimizations have already been applied.
Realizing reversible circuits using a new class of quantum gates
 IN: DESIGN AUTOMATION CONFERENCE
, 2012
"... Quantum computing offers a promising alternative to conventional computation due to the theoretical capacity to solve many important problems with exponentially less complexity. Since every quantum operation is inherently reversible, the desired function is often realized in reversible logic and ..."
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Cited by 7 (6 self)
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Quantum computing offers a promising alternative to conventional computation due to the theoretical capacity to solve many important problems with exponentially less complexity. Since every quantum operation is inherently reversible, the desired function is often realized in reversible logic and then mapped to quantum gates. We consider the realization of reversible circuits using a new class of quantum gates. Our method uses a mapping that grows at a very low linear rate with respect to the number of controls. Results show that, particularly for medium to large circuits, our method yields substantially smaller quantum gate counts than do prior approaches.
ATPG for reversible circuits using simulation, Boolean satisfiability, and pseudo Boolean optimization
 in IEEE Annual Symposium on VLSI
, 2011
"... Abstract—Research in the domain of reversible circuits found significant interest in the last years – not least because of the promising applications e.g. in quantum computation and lowpower design. First physical realizations are already available, motivating the development of efficient testing m ..."
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Cited by 6 (6 self)
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Abstract—Research in the domain of reversible circuits found significant interest in the last years – not least because of the promising applications e.g. in quantum computation and lowpower design. First physical realizations are already available, motivating the development of efficient testing methods for this kind of circuits. In this paper, complementary approaches for automatic test pattern generation for reversible circuits are introduced and evaluated. Besides a simulationbased technique, methods based on Boolean satisfiability and pseudoBoolean optimization are thereby applied. Experiments on large reversible circuits show the suitability of the proposed approaches with respect to different application scenarios and test goals, respectively. I.
Hierarchical synthesis of reversible circuits using positive and negative Davio decomposition
 In Workshop on Reversible Computation
, 2010
"... Abstract—Synthesis of reversible circuits is an important research area providing the basis for a design flow of this emerging technology. Recently, in the development of scalable synthesis approaches a significant step forward has been made by a hierarchical method in combination with Shannon decom ..."
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Cited by 6 (5 self)
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Abstract—Synthesis of reversible circuits is an important research area providing the basis for a design flow of this emerging technology. Recently, in the development of scalable synthesis approaches a significant step forward has been made by a hierarchical method in combination with Shannon decomposition. However, this approach leads to circuits with high costs. In this paper, we propose an alternative that additionally makes use of positive Davio and negative Davio decomposition. We show that the usage of these decomposition types offers several advantages for the synthesis of reversible circuits. Using the proposed approach, on average the number of lines can be reduced by 22%, the number of gates by 22%, and the quantum cost by 32%. In the best case, even reductions of more than 60% are possible. I.
From boolean relations to control software
 in ICSEA 2011
"... Abstract—Many software as well digital hardware automatic synthesis methods define the set of implementations meeting the given system specifications with a boolean relation K. In such a context a fundamental step in the software (hardware) synthesis process is finding effective solutions to the fun ..."
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Cited by 5 (5 self)
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Abstract—Many software as well digital hardware automatic synthesis methods define the set of implementations meeting the given system specifications with a boolean relation K. In such a context a fundamental step in the software (hardware) synthesis process is finding effective solutions to the functional equation defined by K. This entails finding a (set of) boolean function(s) F (typically represented using OBDDs, Ordered Binary Decision Diagrams) such that: 1) for all x for which K is satisfiable, K(x, F (x)) = 1 holds; 2) the implementation of F is efficient with respect to given implementation parameters such as code size or execution time. While this problem has been widely studied in digital hardware synthesis, little has been done in a software synthesis context. Unfortunately the approaches developed for hardware synthesis cannot be directly used in a software context. This motivates investigation of effective methods to solve the above problem when F has to be implemented with software. In this paper, we present an algorithm that, from an OBDD representation for K, generates a C code implementation for F that has the same size as the OBDD for F and a worst case execution time linear in nr, being n = x  the number of input arguments for functions in F and r the number of functions in F.