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...GPU. Cederman et al. [39] and He et al. [14] have demonstrated parallel quicksort implementations, He et al. have implemented a version of most-significant-digit radix sort [34], and Leischner et al. =-=[40]-=- and Dehne et al. [41] have adapted sample-sort (a multi-pivot variation of quicksort) as well. Satish et al. have also developed an efficient GPGPU merge-sort to compliment their radix sorting method...

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...tion, our previous experiments have shown that copying all the point data from CPU memory to GPU memory incurred 25% of overhead which is quite significant. While the GPUbased design and implementation is still useful for reasonably sized point datasets, it is necessary to seek alternative solutions to efficiently index large point datasets. While our CPU-based point indexing approach on multi-core CPUs that will be presented in the next subsection overcomes these problems, we note that several research efforts are available to support GPU-based sorting on CPU memory and external memory (e.g. [56]) and we plan to incorporate these techniques once they become available to make the MLQ based point indexing technique more scalable. 4.2. Point indexing using flatly structured grids We design an alternative approach for point indexing that completely runs on multi-core CPUs. As CPUs can have much larger memory capacity (up to hundreds of GBs on commodity workstations) than GPUs, the approach will eliminate the memory constraints to a certain extent. In addition, there is no need to copy data from CPUmemory to GPU memory anymore which can potentially reduce endto-end runtime considerably. Gr...

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...orts on the GPU include a bitonic sort by Peters et al. [16], a bitonic-based merge sort (named Warpsort) by Ye et al. [26] a Quicksort by Cederman and Tsigas [5] and sample sorts by Leischner et al. =-=[12]-=- and Dehne and Zaboli [8]. In this work we implement a merge-sort-based comparison sort that is well-suited for massively parallel architectures like the GPU. Since a GPU requires hundreds or thousand...

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...vestigate methods of performing call-ups in parallel. 6.3 Sample Sort Sample sort is considered to be one of the most efficient comparisonbased sorting algorithms for distributed memory architectures =-=[17]-=-. It is a generalization of Quicksort, which recursively decomposes its input into n > 2 partitions, and sorts each independently. Because partitions are generated based on pivots randomly selected at...

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...ted in large speedups compared to CPU computation (see e.g. the survey [20]). Even for data intensive tasks such as sorting, advantage over CPU computation has been demonstrated (see e.g. [13], [15], =-=[17]-=-). Many computational problems depend on being able to perform set intersection efficiently. For example: • in boolean matrix multiplication of two matrices, M and M ′, we want to find all pairs (i, j...

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...iscrete and combinatorial problems with data dependent memory access patterns is still in its infancy. In fact, there is currently still a lively debate even on the best sorting method for GPUs (e.g. =-=[14, 9]-=-). Until very recently, the comparison-based Thrust Merge method [14] by Nadathur Satish, Mark Harris and Michael Garland of nVIDIA Corporation was considered the best sorting method for GPUs. However...

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...s are sorted, we apply binary search Publication Author Device CPU Rate 2009 [23] NVIDIA GTX 280 200 2010 [25] Intel Knights Ferry vs. GTX 280 560 176 2010 [24] Intel Core i7 vs. GTX 280 250 200 2009 =-=[13]-=- University Tesla C1060 300 2010 [14] University GTX 285 550 2011 [15] University GTX 480 1005 Table 2: Comparison of different reported sort implementations on CPUs and GPUs. The rates describe the n...

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...rallel flavor. Several high performance sorting algorithms have been designed for it. Cederman and Tsigas developed an implementation of Quicksort [5], sample sort was implemented by Leischner et al. =-=[11]-=-. Satish et al. developed a radix sort on GPU which outperformed an 8-core CPU by 4× [16]. Their performance benefits from the reducing of scattered writes to global memory by making use of on-chip sh...