Results 1  10
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42
Systematic simulation using sensitivity analysis
 IN HSCC
, 2007
"... In this paper we propose a new technique for verification by simulation of continuous and hybrid dynamical systems with uncertain initial conditions. We provide an algorithmic methodology that can, in most cases, verify that the system avoids a set of bad states by conducting a finite number of sim ..."
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Cited by 37 (4 self)
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In this paper we propose a new technique for verification by simulation of continuous and hybrid dynamical systems with uncertain initial conditions. We provide an algorithmic methodology that can, in most cases, verify that the system avoids a set of bad states by conducting a finite number of simulation runs starting from a finite subset of the set of possible initial conditions. The novelty of our approach consists in the use of sensitivity analysis, developed and implemented in the context of numerical integration, to efficiently characterize the coverage of sampling trajectories.
Analog/MixedSignal Circuit Verification Using Models Generated from Simulation Traces ⋆
"... Abstract. Formal and semiformal verification of analog/mixedsignal circuits is complicated by the difficulty of obtaining circuit models suitable for analysis. We propose a method to generate a formal model from simulation traces. The resulting model is conservative in that it includes all of the ..."
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Cited by 22 (6 self)
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Abstract. Formal and semiformal verification of analog/mixedsignal circuits is complicated by the difficulty of obtaining circuit models suitable for analysis. We propose a method to generate a formal model from simulation traces. The resulting model is conservative in that it includes all of the original simulation traces used to generate it plus additional behavior. Information obtained during the model generation process can also be used to refine the simulation and verification process. 1
Verification of analog/mixedsignal circuits using labeled hybrid petri nets
 IN: PROC. OF ICCAD
, 2006
"... System on a chip design results in the integration of digital, analog, and mixedsignal circuits on the same substrate which further complicates the already difficult validation problem. This paper presents a new model, labeled hybrid Petri nets (LHPNs), that is developed to be capable of modeling s ..."
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Cited by 19 (9 self)
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System on a chip design results in the integration of digital, analog, and mixedsignal circuits on the same substrate which further complicates the already difficult validation problem. This paper presents a new model, labeled hybrid Petri nets (LHPNs), that is developed to be capable of modeling such a heterogeneous set of components. This paper also describes a compiler from VHDLAMS to LHPNs. To support formal verification, this paper presents an efficient zonebased state space exploration algorithm for LHPNs. This algorithm uses a process known as warping to allow zones to describe continuous variables that may be changing at variable rates. Finally, this paper describes the application of this algorithm to a couple of analog/mixedsignal circuit examples.
IMITATOR II: A tool for solving the good parameters problem in timed automata
 In INFINITY
, 2010
"... We present here IMITATOR II, a new version of IMITATOR, a tool implementing the “inverse method” for parametric timed automata: given a reference valuation of the parameters, it synthesizes a constraint such that, for any valuation satisfying this constraint, the system behaves the same as under the ..."
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Cited by 12 (6 self)
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We present here IMITATOR II, a new version of IMITATOR, a tool implementing the “inverse method” for parametric timed automata: given a reference valuation of the parameters, it synthesizes a constraint such that, for any valuation satisfying this constraint, the system behaves the same as under the reference valuation in terms of traces, i.e., alternating sequences of locations and actions. IMITATOR II also implements the “behavioral cartography algorithm”, allowing us to solve the following good parameters problem: find a set of valuations within a given bounded parametric domain for which the system behaves well. We present new features and optimizations of the tool, and give results of applications to various examples of asynchronous circuits and communication protocols. 1
Combining symbolic simulation and interval arithmetic for the verification of AMS designs
 in: IEEE International Conference on Formal Methods in ComputerAided Design, 2007
"... Abstract—Analog and mixed signal (AMS) designs are important integrated circuits that are usually needed at the interface between the electronic system and the real world. Recently, several formal techniques have been introduced for AMS verification. In this paper, we propose a difference equation ..."
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Cited by 10 (2 self)
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Abstract—Analog and mixed signal (AMS) designs are important integrated circuits that are usually needed at the interface between the electronic system and the real world. Recently, several formal techniques have been introduced for AMS verification. In this paper, we propose a difference equations based bounded model checking approach for AMS systems. We define model checking using a combined system of difference equations for both the analog and digital parts, where the state space exploration algorithm is handled with Taylor approximations over interval domains. We illustrate our approach on the verification of several AMS designs including ∆Σ modulator and oscillator circuits. I.
A symbolic methodology for the verification of analog and mixed signal designs
 In Proc. Design, Automation and Test in Europe (DATE) (2007
"... We propose a new symbolic verification methodology for proving the properties of analog and mixed signal (AMS) designs. Starting with an AMS description and a set of properties and using symbolic computation, we extract a normal mathematical representation for the system in terms of recurrence equ ..."
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Cited by 9 (1 self)
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We propose a new symbolic verification methodology for proving the properties of analog and mixed signal (AMS) designs. Starting with an AMS description and a set of properties and using symbolic computation, we extract a normal mathematical representation for the system in terms of recurrence equations. These normalized equations are used along with an induction verification strategy defined inside the computer algebra system Mathematica to prove the correctness of the properties. We apply our methodology on a third order ∆Σ modulator. 1
Formal Verification of PhaseLocked Loops Using Reachability Analysis and Continuization
"... Wepresentanapproachfor verifyinglockingofchargepump phaselocked loops by performing reachability analysis on a behavioral model of the circuit. Bounded uncertain parameters in the behavioral model make it possible to represent all possible behaviors of more detailed models. The dynamics of the beh ..."
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Cited by 8 (3 self)
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Wepresentanapproachfor verifyinglockingofchargepump phaselocked loops by performing reachability analysis on a behavioral model of the circuit. Bounded uncertain parameters in the behavioral model make it possible to represent all possible behaviors of more detailed models. The dynamics of the behavioral model is hybrid (i.e., discrete and continuous) due to the switching of charge pumps that drive the analog control circuits. A unique feature of phaselocked loops compared to most other hybrid systems is that they require thousands of switchings in the continuous dynamics to converge sufficiently close to a limit cycle. This makes reachability analysis a challenging task since switches in the dynamics are expensive to compute and result in conservative overapproximations. We solve this problem by overapproximating the effects of the switching conditions with uncertain parameters inlinear continuousmodels, amethodwe call continuization. Using efficient reachability algorithms for discretetime linear systems, locking is verified over the complete range of possible initial states of a chargepump PLL designed in 32nm CMOS SOI technology in comparable time required for Monte Carlo simulations of the same behavioral model. 1.
Bounded Model Checking of Analog and MixedSignal Circuits Using an SMT Solver ⋆
"... Abstract. This paper presents a bounded model checking algorithm for the verification of analog and mixedsignal (AMS) circuits using a satisfiability modulo theories (SMT) solver. The systems are modeled in VHDLAMS, a hardware description language for AMS circuits. In this model, system safety pro ..."
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Cited by 7 (3 self)
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Abstract. This paper presents a bounded model checking algorithm for the verification of analog and mixedsignal (AMS) circuits using a satisfiability modulo theories (SMT) solver. The systems are modeled in VHDLAMS, a hardware description language for AMS circuits. In this model, system safety properties are specified as assertion statements. The VHDLAMS description is compiled into labeled hybrid Petri nets (LHPNs) in which analog values are modeled as continuous variables that can change at rates in a bounded range and digital values are modeled using Boolean signals. The verification method begins by transforming the LHPN model into an SMT formula composed of the initial state, the transition relation unrolled for a specified number of iterations, and the complement of the assertion in each set of state variables. When this formula evaluates to true, this indicates a violation of the assertion and an error trace is reported. This method has been implemented and preliminary results are promising. 1
Model Checking of Analog Systems using an Analog Specification Language
"... In this contribution an advanced methodology for model checking of analog systems is introduced. A new Analog Specification Language (ASL) for efficient property specifications is defined and model checking algorithms for implementing this language are presented. This allows verification of complex ..."
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Cited by 6 (1 self)
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In this contribution an advanced methodology for model checking of analog systems is introduced. A new Analog Specification Language (ASL) for efficient property specifications is defined and model checking algorithms for implementing this language are presented. This allows verification of complex static and dynamic circuit properties like Oscillation and Startup Time that have not yet been formally verifiable with previous approaches. The new verification methodology is applied to example circuits and experimental results are discussed and compared to conventional circuit simulation. 1.
Abstract Modeling and Simulation Aided Verification of Analog/MixedSignal Circuits
, 2008
"... Abstract. Analog/Mixedsignal (AMS) circuit verification is a growing problem as process variation increases and AMS circuits become more functionally complex. To improve analog verification flows, AMS circuit models are needed at different levels of abstraction. This paper discusses recent work and ..."
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Cited by 6 (0 self)
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Abstract. Analog/Mixedsignal (AMS) circuit verification is a growing problem as process variation increases and AMS circuits become more functionally complex. To improve analog verification flows, AMS circuit models are needed at different levels of abstraction. This paper discusses recent work and future directions for abstract model generation and simulation aided verification of AMS circuits. In particular, a CMOS ring oscillator with feedforward inverters is used as a motivating example for the work. This example highlights progress and future directions in AMS modeling and verification. 1