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Effective and Efficient Scheduling of Certifiable Mixed-Criticality Sporadic Task Systems
"... Abstract—An increasing trend in embedded system design is to integrate components with different levels of criticality into a shared hardware platform for better cost and power efficiency. Such mixed-criticality systems are subject to certifications at different levels of rigorousness, for validatin ..."
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Abstract—An increasing trend in embedded system design is to integrate components with different levels of criticality into a shared hardware platform for better cost and power efficiency. Such mixed-criticality systems are subject to certifications at different levels of rigorousness, for validating the correctness of different subsystems on various confidence levels. The realtime scheduling of certifiable mixed-criticality systems has been recognized to be a challenging problem, where using traditional scheduling techniques may result in unacceptable resource waste. In this paper we present an algorithm called PLRS to schedule certifiable mixed-criticality sporadic tasks systems. PLRS uses fixed-job-priority scheduling, and assigns job priorities by exploring and balancing the asymmetric effects between the workload on different criticality levels. Comparing with the state-of-the-art algorithm by Li and Baruah for such systems, which we refer to as LB, PLRS is both more effective and more efficient: (i) The schedulability test of PLRS not only theoretically dominates, but also on average significantly outperforms LB’s. (ii) The run-time complexity of PLRS is polynomial (quadratic in the number of tasks), which is much more efficient than the pseudo-polynomial run-time complexity of LB. I.
Enhanced Race-To-Halt: A Leakage-Aware Energy Management Approach for Dynamic Priority Systems
- in 2011 23rd Euromicro Conference on Real-Time Systems. IEEE
, 2011
"... With progressing CMOS technology miniaturization, the leakage power consumption starts to dominate the dynamic power consumption. The recent technology trends have equipped the modern embedded processors with the several sleep states and reduced their overhead (energy/time) of the sleep transition. ..."
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Cited by 8 (3 self)
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With progressing CMOS technology miniaturization, the leakage power consumption starts to dominate the dynamic power consumption. The recent technology trends have equipped the modern embedded processors with the several sleep states and reduced their overhead (energy/time) of the sleep transition. The dynamic voltage frequency scaling (DVFS) potential to save energy is diminishing due to efficient (low overhead) sleep states and increased static (leakage) power consumption. The state-of-the-art research on static power reduction at system level is based on assumptions that cannot easily be integrated into practical systems. We propose a novel enhanced race-to-halt approach (ERTH) to reduce the overall system energy consumption. The exhaustive simulations demonstrate theeffectiveness of our approach showing an improvement of up to 8 % over an existing work.
A Synchronous IPC Protocol for Predictable Access to Shared Resources in Mixed-Criticality Systems
"... Abstract—In mixed-criticality systems, highly critical tasks must be temporally and logically isolated from faults in lower-criticality tasks. Such strict isolation, however, is difficult to ensure even for independent tasks, and has not yet been attained if low-and high-criticality tasks must share ..."
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Abstract—In mixed-criticality systems, highly critical tasks must be temporally and logically isolated from faults in lower-criticality tasks. Such strict isolation, however, is difficult to ensure even for independent tasks, and has not yet been attained if low-and high-criticality tasks must share resources subject to mutual exclusion constraints (e.g., shared data structures, peripheral I/O devices, or OS services), as it is often the case in practical systems. Taking a pragmatic, systems-oriented point of view, this paper motivates the need for temporal and logical isolation in resource-sharing mixed-criticality workloads and argues that traditional real-time locking approaches are entirely unsuitable in a mixed-criticality context: locking is an inherently cooperative activity and requires trust. Instead, a solution based on resource servers (in the microkernel sense) is proposed, and the MC-IPC, a novel syn-chronous multiprocessor IPC protocol for invoking such servers, is presented. The MC-IPC provides strict temporal isolation among mutually untrusted tasks and enables predictable cross-criticality synchronization. It is shown to be practically viable with a pro-totype implementation in LITMUSRT and validated with a case study involving several antagonistic failure modes. Finally, the MC-IPC is shown to offer analytical benefits in the context of Vestal’s mixed-criticality task model. I.
Chapter 1 Trustworthy Real-Time Systems
"... Abstract Embedded systems have experienced a dramatic increase in ubiquity and functionality. They have penetrated our life to a degree where we rely heavily on them and at the same time entrust them with vast amounts of personal information. The trust placed in them does not necessarily mean they a ..."
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Abstract Embedded systems have experienced a dramatic increase in ubiquity and functionality. They have penetrated our life to a degree where we rely heavily on them and at the same time entrust them with vast amounts of personal information. The trust placed in them does not necessarily mean they are trustworthy. Within this chapter we summarise past research of the ERTOS group at NICTA in the area and provide the initial reasoning which motivated that research. Topics covered are a secure kernel design and the design and verification of this kernel design, as well as work on scheduling and WCET analysis. 1.1
