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Specification of RealTime and Hybrid Systems in Rewriting Logic
, 1999
"... This paper explores the application of rewriting logic to the executable formal modeling of realtime and hybrid systems. We give general techniques by which such systems can be specified as ordinary rewrite theories, and show that a wide range of realtime and hybrid system models, including object ..."
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Cited by 40 (26 self)
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This paper explores the application of rewriting logic to the executable formal modeling of realtime and hybrid systems. We give general techniques by which such systems can be specified as ordinary rewrite theories, and show that a wide range of realtime and hybrid system models, including objectoriented systems, timed automata [4], hybrid automata [2], timed and phase transition systems [28], and timed extensions of Petri nets [1,37], can indeed be expressed in rewriting logic quite naturally and directly. Since rewriting logic is executable and is supported by several language implementations, our approach complements propertyoriented methods and tools less well suited for execution purposes. The relationships with the timed rewriting logic approach of Kosiuczenko and Wirsing [24,25] are also studied. 1 Introduction This paper explores the application of rewriting logic to the executable formal modeling of realtime and hybrid systems. The general conceptual advantage of using...
Deductive verification of realtime systems using STeP
 COMPUTER SCIENCE DEPARTMENT, STANFORD UNIVERSITY
, 1998
"... We present a modular framework for proving temporal properties of realtime systems, based on clocked transition systems and lineartime temporal logic. We show how deductive verification rules, verification diagrams, and automatic invariant generation can be used to establish properties of realtim ..."
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Cited by 34 (8 self)
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We present a modular framework for proving temporal properties of realtime systems, based on clocked transition systems and lineartime temporal logic. We show how deductive verification rules, verification diagrams, and automatic invariant generation can be used to establish properties of realtime systems in this framework. We also discuss global and modular proofs of the branchingtime property of nonZenoness. As an example, we present the mechanical verification of the generalized railroad crossing case study using the Stanford Temporal Prover, STeP.
Applying System Execution Modeling Tools to Evaluate Enterprise Distributed Realtime and Embedded System QoS
 In Proceedings of the 12th International Conference on Embedded and RealTime Computing Systems and Applications
, 2006
"... Component middleware is popular for enterprise distributed systems because it provides effective reuse of the core intellectual property (i.e., the “business logic”). Componentbased enterprise distributed realtime and embedded (DRE) systems, however, incur new integration problems associated with ..."
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Cited by 32 (22 self)
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Component middleware is popular for enterprise distributed systems because it provides effective reuse of the core intellectual property (i.e., the “business logic”). Componentbased enterprise distributed realtime and embedded (DRE) systems, however, incur new integration problems associated with component configuration and deployment. New research is therefore needed to minimize the gap between the development and deployment/configuration of components, so that deployment and configuration strategies can be evaluated well before system integration. This paper uses an industrial case study from the domain of shipboard computing to show how system execution modeling tools can provide software and system engineers with quantitative estimates of system bottlenecks and performance characteristics to help evaluate the performance of componentbased enterprise DRE systems and reduce time/effort in the integration phase. The results from our case study show the benefits of system execution modeling tools and pinpoint where more work is needed. 1.
An improved reachability analysis method for strongly linear hybrid systems (extended abstract
 In Computer Aided Verification, 9th International Conference, CAV ’97
"... Abstract. This paper addresses the exact computation of the set of reachable states of a strongly linear hybrid system. It proposes an approach that is an extension of classical statespace exploration. This approach uses a new operation, based on a cycle analysis in the control graph of the system, ..."
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Cited by 29 (15 self)
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Abstract. This paper addresses the exact computation of the set of reachable states of a strongly linear hybrid system. It proposes an approach that is an extension of classical statespace exploration. This approach uses a new operation, based on a cycle analysis in the control graph of the system, for generating sets of reachable states, as well as a powerful representation system for sets of values. The method broadens the range of hybrid systems for which a finite and exact representation of the set of reachable states can be computed. In particular, the statespace exploration may be performed even if the set of variable values reachable at a given control location cannot be expressed as a finite union of convex regions. The technique is illustrated on a very simple example. 1
Combining Specification Techniques for Processes, Data and Time
 Nordic Journal of Computing
, 2002
"... We present a new combination CSPOZDC of three well researched formal techniques for the specification of processes, data and time: CSP [17], ObjectZ [36], and Duration Calculus [40]. The emphasis is on a smooth integration of the underlying semantic models and its use for verifying properties ..."
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Cited by 25 (4 self)
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We present a new combination CSPOZDC of three well researched formal techniques for the specification of processes, data and time: CSP [17], ObjectZ [36], and Duration Calculus [40]. The emphasis is on a smooth integration of the underlying semantic models and its use for verifying properties of CSPOZDC specifications by a combined application of the modelcheckers FDR [29] for CSP and UPPAAL [1] for Timed Automata. This approach is applied to part of a case study on radio controlled railway crossings.
Time constraint patterns for event B development
 of Lecture Notes in Computer Science
, 2007
"... Abstract Distributed applications are based on algorithms which should be able to deal with time constraints. It is mandatory to express time constraints in (mathematical) models and the current work intends to integrate time constraints in the modelling process based on event B models and refinemen ..."
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Cited by 24 (6 self)
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Abstract Distributed applications are based on algorithms which should be able to deal with time constraints. It is mandatory to express time constraints in (mathematical) models and the current work intends to integrate time constraints in the modelling process based on event B models and refinement. The starting point of our work is the event B development of the IEEE 1394 leader election protocol; from standard documents, we derive temporal requirements to solve the contention problem and we propose a method for introducing time constraints using a pattern. The pattern captures time constraints in a generic event B development and it is applied to the IEEE 1394 case study. Keywords: event B, pattern, distributed systems, refinement. 1
Timed automaton models for simple programmable logic controllers
 IN THE PROCEEDINGS OF THE EUROMICRO CONFERENCE ON REALTIME SYSTEMS THAT WAS HELD IN YORK (UK) ON
, 1999
"... We give timed automaton models for a class of Programmable Logic Controller (PLC) applications, that are programmed in a simple fragment of the language Instruction Lists as defined in the standard IEC 11313. Two different approaches for modelling timers are suggested, that lead to two different ti ..."
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Cited by 24 (3 self)
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We give timed automaton models for a class of Programmable Logic Controller (PLC) applications, that are programmed in a simple fragment of the language Instruction Lists as defined in the standard IEC 11313. Two different approaches for modelling timers are suggested, that lead to two different timed automaton models. The purpose of this work is to provide a basis for verification and testing of realtime properties of PLC applications. Our work can be seen in broader context: it is a contribution to methodical development of provably correct programs. Even if the present PLC hardware will be substituted by e.g. Personal Computers, with a similar operation mode, the development and verification method will remain useful.
Efficient Data Structure for Fully Symbolic Verification of RealTime Software Systems
 Proceedings of the 6th International Conference on Tools and Algorithms for the Construction and Analysis of Systems (TACAS 2000), LNCS 1785
"... A new datastructure called DDD (DataDecision Diagram) for the fully symbolic modelchecking of realtime software systems is proposed. DDD is a BDDlike datastructure for the encoding of regions [2]. Unlike DBM which records differences between pairs of clock readings, DDD only uses one auxiliar ..."
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Cited by 23 (7 self)
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A new datastructure called DDD (DataDecision Diagram) for the fully symbolic modelchecking of realtime software systems is proposed. DDD is a BDDlike datastructure for the encoding of regions [2]. Unlike DBM which records differences between pairs of clock readings, DDD only uses one auxiliary binary variable for each clock. Thus the number of variables used in DDD is always linear to the number of clocks declared in the input system description. Experiment has been carried out to compare DDD with previous technologies. 1 Introduction Fully symbolic verification of realtime systems is desirable with the promise of efficient datasharing. We propose Data Decision Diagram (DDD) as the new datastructure for such a purpose. DDD is a BDDlike datastructure [5, 8] for the encoding of regions [2]. The ordering among fractional parts of clock readings is explicitly encoded in the variable ordering of DDD. To record sets of clock readings with the same fractional parts, we add one...
Visual Timed Event Scenarios
 Proceedings of the 26th International Conference on Software Engineering
, 2004
"... Formal description of realtime requirements is a difficult and error prone task. Conceptual and tool support for this activity plays a central role in the agenda of technology transference from the formal verification engineering community to the Real Time Systems development practice. In this arti ..."
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Cited by 22 (6 self)
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Formal description of realtime requirements is a difficult and error prone task. Conceptual and tool support for this activity plays a central role in the agenda of technology transference from the formal verification engineering community to the Real Time Systems development practice. In this article we present VTS, a visual language to define complex eventbased requirements such as freshness, bounded response, event correlation, etc. The underlying formalism is based on partial orders and supports realtime constraints. The problem of checking whether a timed automaton model of a system satisfies these sort of scenarios is shown to be decidable. Moreover, we have also developed a tool that translates visually specified scenarios into observer timed automata. The resulting automata can be composed with a model under analysis in order to check satisfaction of the stated scenarios. We show the benefits of applying these ideas to some case studies. 1.
Diagnostic ModelChecking for RealTime Systems
, 1996
"... Uppaal is a new tool suit for automatic verification of networks of timed automata. In this paper we describe the diagnostic modelchecking feature of Uppaal and illustrates its usefulness through the debugging of (a version of) the Philips AudioControl Protocol. Together with a graphical interf ..."
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Cited by 21 (9 self)
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Uppaal is a new tool suit for automatic verification of networks of timed automata. In this paper we describe the diagnostic modelchecking feature of Uppaal and illustrates its usefulness through the debugging of (a version of) the Philips AudioControl Protocol. Together with a graphical interface of Uppaal this diagnostic feature allows for a number of errors to be more easily detected and corrected.