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A Light-Weight Statically Scheduled Network-on-Chip
"... Abstract—This paper investigates how a light-weight, statically scheduled network-on-chip (NoC) for real-time systems can be designed and implemented. The NoC provides communication channels between all cores with equal bandwidth and latency. The design is FPGA-friendly and consumes a minimum of res ..."
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Abstract—This paper investigates how a light-weight, statically scheduled network-on-chip (NoC) for real-time systems can be designed and implemented. The NoC provides communication channels between all cores with equal bandwidth and latency. The design is FPGA-friendly and consumes a minimum of resources. We implemented a 64 core 16-bit multiprocessor connected with the proposed NoC in a low-cost FPGA. I.
T-CREST: A time-predictable multi-core platform for aerospace applications
- in Proceedings of Data Systems In Aerospace (DASIA 2014
, 2014
"... Space systems are hard real-time systems, where the worst-case execution time (WCET) of tasks needs to be known to prove absence of deadline misses. For sim-ple processor and memory architectures it is possible to statically derive a safe upper bound of the WCET. How-ever, future requirements in mor ..."
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Cited by 3 (3 self)
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Space systems are hard real-time systems, where the worst-case execution time (WCET) of tasks needs to be known to prove absence of deadline misses. For sim-ple processor and memory architectures it is possible to statically derive a safe upper bound of the WCET. How-ever, future requirements in more autonomous missions require more processing power. This increase in process-ing power is approached by multi-core processors. How-ever, current multi-core processors are not WCET ana-lyzable. The mission of T-CREST is to develop tools and build a multi-core system that provides high performance, but be WCET analyzable. The T-CREST time-predictable sys-tem will simplify the safety argument with respect to the maximum execution time and increase the performance with multi-core technology. Thus the T-CREST system will result in lower costs for safety-relevant applications, reducing system complexity, simultaneously providing faster time-predictable execution. Most of the T-CREST technology is available in open-source.
ABSTRACT YAGNA, KARTHIK. Efficient Collective Communication for Multi-core NOC Interconnects.
, 2013
"... (Under the direction of Dr. Frank Mueller.) Massive multi-core embedded processors with network-on-chip (NoC) architectures are becoming common. These architectures provide higher processing capability due to an abundance of cores. They provide native core-to-core communication that can be exploited ..."
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(Under the direction of Dr. Frank Mueller.) Massive multi-core embedded processors with network-on-chip (NoC) architectures are becoming common. These architectures provide higher processing capability due to an abundance of cores. They provide native core-to-core communication that can be exploited via message passing to provide system scalability. Despite these advantages, multicores pose predictability challenges that can affect both performance and real-time capabilities. In this work, we develop efficient and predictable group communication using message passing specifically designed for large core counts in 2D mesh NoC architectures. We have implemented the most commonly used collectives in such a way that they incur low latency and high timing predictability making them suitable for balanced parallelization of scalable highperformance systems and real-time systems alike. Experimental results on a 64 core hardware platform show that our collectives can significantly reduce communication times by up to 95% for single packet messages and up to 98 % for longer messages with superior performance for sometimes all message sizes and sometimes only small message sizes depending on the group primitive. In addition, our communication primitives have significantly lower variance than prior approaches, thereby providing more balanced parallel execution progress and better real-time