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32
Temporal specifications with accumulative values
 In LICS
, 2011
"... Abstract—There is recently a significant effort to add quantitative objectives to formal verification and synthesis. We introduce and investigate the extension of temporal logics with quantitative atomic assertions, aiming for a general and flexible framework for quantitativeoriented specifications ..."
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Abstract—There is recently a significant effort to add quantitative objectives to formal verification and synthesis. We introduce and investigate the extension of temporal logics with quantitative atomic assertions, aiming for a general and flexible framework for quantitativeoriented specifications. In the heart of quantitative objectives lies the accumulation of values along a computation. It is either the accumulated summation, as with the energy objectives, or the accumulated average, as with the meanpayoff objectives. We investigate the extension of temporal logics with the prefixaccumulation assertions Sum(v) ≥ c and Avg(v) ≥ c, where v is a numeric variable of the system, c is a constant rational number, and Sum(v) and Avg(v) denote the accumulated sum and average of the values of v from the beginning of the computation up to the current point of time. We also allow the pathaccumulation assertions LimInfAvg(v) ≥ c and LimSupAvg(v) ≥ c, referring to the average value along an entire computation. We study the border of decidability for extensions of various temporal logics. In particular, we show that extending the fragment of CTL that has only the EX, EF, AX, and AG temporal modalities by prefixaccumulation assertions and extending LTL with pathaccumulation assertions, result in temporal logics whose modelchecking problem is decidable. The extended logics allow to significantly extend the currently known energy and meanpayoff objectives. Moreover, the prefixaccumulation assertions may be refined with “controlledaccumulation”, allowing, for example, to specify constraints on the average waiting time between a request and a grant. On the negative side, we show that the fragment we point to is, in a sense, the maximal logic whose extension with prefixaccumulation assertions permits a decidable modelchecking procedure. Extending a temporal logic that has the EG or EU modalities, and in particular CTL and LTL, makes the problem undecidable. I.
Temporal Logic Verification Using Simulation
 In Proc. FORMATS’06
, 2006
"... Abstract. In this paper, we consider a novel approach to the temporal logic verification problem of continuous dynamical systems. Our methodology has the distinctive feature that enables the verification of the temporal properties of a continuous system by verifying only a finite number of its (simu ..."
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Cited by 16 (7 self)
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Abstract. In this paper, we consider a novel approach to the temporal logic verification problem of continuous dynamical systems. Our methodology has the distinctive feature that enables the verification of the temporal properties of a continuous system by verifying only a finite number of its (simulated) trajectories. The proposed framework comprises two main ideas. First, we take advantage of the fact that in metric spaces we can quantify how close are two different states. Based on that, we define robust, multivalued semantics for MTL (and LTL) formulas. These capture not only the usual Boolean satisfiability of the formula, but also topological information regarding the distance from unsatisfiability. Second, we use the recently developed notion of bisimulation functions to infer the behavior of a set of trajectories that lie in the neighborhood of the simulated one. If the latter set of trajectories is bounded by the tube of robustness, then we can infer that all the trajectories in the neighborhood of the simulated one satisfy the same temporal specification as the simulated trajectory. The interesting and promising feature of our approach is that the more robust the system is with respect to the temporal logic specification, the less is the number of simulations that are required in order to verify the system. 1
Systematic Construction of Abstractions for ModelChecking
 In Proceedings of 7th International Conference on Verification, ModelChecking, and Abstract Interpretation (VMCAI’06), volume 3855 of LNCS
, 2006
"... This paper describes a framework, based on Abstract Interpretation, for creating abstractions for modelchecking. Specifically, we study how to abstract models of µcalculus and systematically derive abstractions that are constructive, sound, and precise, and apply them to abstracting Kripke structur ..."
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Cited by 14 (6 self)
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This paper describes a framework, based on Abstract Interpretation, for creating abstractions for modelchecking. Specifically, we study how to abstract models of µcalculus and systematically derive abstractions that are constructive, sound, and precise, and apply them to abstracting Kripke structures. The overall approach is based on the use of bilattices to represent partial and inconsistent information. 1
Hail: A language for easy and correct device access
 In Proceedings of the 5th ACM International Conference on Embedded Software, EMSOFT ’05
, 2005
"... ABSTRACT It is difficult to write device drivers. One factor is that writing lowlevel code for accessing devices and manipulating their registers is tedious and errorprone. For many systemonchip based systems, buggy hardware, imprecise documentation, and code reuse worsen the situation further. ..."
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Cited by 13 (0 self)
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ABSTRACT It is difficult to write device drivers. One factor is that writing lowlevel code for accessing devices and manipulating their registers is tedious and errorprone. For many systemonchip based systems, buggy hardware, imprecise documentation, and code reuse worsen the situation further. This paper presents HAIL (Hardware Access Interface Language), a languagebased approach to simplify device access programming and generate error checking code against bugs in software, hardware, and documentation. HAIL is a domainspecific language that specifies all aspects of a device's programming interface and the access methods in a particular system and OS. A compiler automatically checks the specification and translates it into C code for device access, with optional debugging code. The generated code can be included directly into device driver code. In the paper, we argue that HAIL lowers development effort, incurs minimal runtime overhead, and reduces device access related bugs. We also show that the HAIL specification can be reused for different operating systems, thereby reducing porting costs.
Formalizing and reasoning about quality
, 2012
"... Abstract. Traditional formal methods are based on a Boolean satisfaction notion: a reactive system satisfies, or not, a given specification. We generalize formal methods to also address the quality of systems. As an adequate specification formalism we introduce the linear temporal logic LTL[F]. The ..."
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Abstract. Traditional formal methods are based on a Boolean satisfaction notion: a reactive system satisfies, or not, a given specification. We generalize formal methods to also address the quality of systems. As an adequate specification formalism we introduce the linear temporal logic LTL[F]. The satisfaction value of an LTL[F] formula is a number between 0 and 1, describing the quality of the satisfaction. The logic generalizes traditional LTL by augmenting it with a (parameterized) set F of arbitrary functions over the interval [0, 1]. For example, F may contain the maximum or minimum between the satisfaction values of subformulas, their product, and their average. The classical decision problems in formal methods, such as satisfiability, model checking, and synthesis, are generalized to search and optimization problems in the quantitative setting. For example, model checking asks for the quality in which a specification is satisfied, and synthesis returns a system satisfying the specification with the highest quality. Reasoning about quality gives rise to other natural questions, like the distance between specifications. We formalize these basic questions and study them for LTL[F]. By extending the automatatheoretic approach for LTL to a setting that takes quality into an account, we are able to solve the above problems and show that reasoning about LTL[F] has roughly the same complexity as reasoning about traditional LTL. 1
Isolation and Characterization of
 IgG1 with Asymmetrical Fc Glycosylation,” Glycobiology,
, 2011
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Model checking Quantitative Linear Time Logic
"... This paper considers QLtl, a quantitative analagon of Ltl and presents algorithms for model checking QLtl over quantitative versions of Kripke structures and Markov chains. Keywords: Linear temporal logic, Quantitative verification, Automata. ..."
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This paper considers QLtl, a quantitative analagon of Ltl and presents algorithms for model checking QLtl over quantitative versions of Kripke structures and Markov chains. Keywords: Linear temporal logic, Quantitative verification, Automata.
Solving counter parity games
 In Proc. of MFCS’12, LNCS
, 2012
"... Abstract. We study a class of parity games equipped with counters that evolve according to arbitrary nonnegative affine functions. These games capture several cost models for dynamic systems from the literature. We present an elementary algorithm for computing the exact value of a counter parity ga ..."
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Cited by 3 (2 self)
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Abstract. We study a class of parity games equipped with counters that evolve according to arbitrary nonnegative affine functions. These games capture several cost models for dynamic systems from the literature. We present an elementary algorithm for computing the exact value of a counter parity game, which both generalizes previous results and improves their complexity. To this end, we introduce a class of ωregular games with imperfect information and imperfect recall, solve them using automatabased techniques, and prove a correspondence between finitememory strategies in such games and strategies in counter parity games. 1
Discounting in LTL
"... Abstract. In recent years, there is growing need and interest in formalizing and reasoning about the quality of software and hardware systems. As opposed to traditional verification, where one handles the question of whether a system satisfies, or not, a given specification, reasoning about quality ..."
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Cited by 2 (2 self)
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Abstract. In recent years, there is growing need and interest in formalizing and reasoning about the quality of software and hardware systems. As opposed to traditional verification, where one handles the question of whether a system satisfies, or not, a given specification, reasoning about quality addresses the question of how well the system satisfies the specification. One direction in this effort is to refine the “eventually ” operators of temporal logic to discounting operators: the satisfaction value of a specification is a value in [0, 1], where the longer it takes to fulfill eventuality requirements, the smaller the satisfaction value is. In this paper we introduce an augmentation by discounting of Linear Temporal Logic (LTL), and study it, as well as its combination with propositional quality operators. We show that one can augment LTL with an arbitrary set of discounting functions, while preserving the decidability of the modelchecking problem. Further augmenting the logic with unary propositional quality operators preserves decidability, whereas adding an averageoperator makes the modelchecking problem undecidable. We also discuss the complexity of the problem, as well as various extensions. 1