In this paper we propose a specification intermediate model in order to handle a seamless global design of complex and heterogeneous digital systems. This model is based on three views: System, Process, Function and targets control-oriented and signal processing applications. The model exhibits all the information (e.g. operators, controls, multi-dimensional operands) required to estimate memory, control and computation units and to partition the application onto an heterogeneous

Continuous advances in processor and ASIC technologies enable the integration of more and more complex embedded systems. Embedded systems have become commonplace in recent years. Since their implementations generally require the use of heterogeneous resources (e.g., processor cores, ASICs) in one system with hard design constraints, the importance of hardware/software codesign methodologies increases steadily. HW/SW codesign approaches consist generally of HW/SW partitioning and scheduling, constrained code generation, and hardware and interface synthesis. This article presents the codesign of an industrial experi-ment in acoustic echo cancellation (GMDFa algorithm) and emphasizes the partitioning and communication synthesis steps. This experiment brings to light interesting problems such as data and program distribution between system memories and the modeling of communications in the partitioning process.