(Enter summary)
Abstract: This thesis presents a new mapping strategy and modified architectures for implementing
general purpose inner product computations, using enhanced Fermat ALU theory. The
structure is based on a direct product finite polynomial ring mapping of a redundant binary
representation of the input data; in effect we exploit the double redundancy of the input
representation and the mapped polynomial representation. By exploiting this redundancy,
with attendant reductions in coefficient growth due to... (Update)
Cited by: More
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BibTeX entry: (Update)
M. Shahkarami, Exploiting Redundancy in Modulus Replication Inner Product Processors, Ph.D. Thesis, University of Windsor, 1999 http://citeseer.ist.psu.edu/shahkarami99exploiting.html More
@misc{ shahkarami99exploiting,
author = "M. Shahkarami",
title = "Exploiting Redundancy in Modulus Replication Inner Product Processors",
text = "M. Shahkarami, Exploiting Redundancy in Modulus Replication Inner Product
Processors, Ph.D. Thesis, University of Windsor, 1999",
year = "1999",
url = "citeseer.ist.psu.edu/shahkarami99exploiting.html" }
Citations (may not include all citations):
104
Why Systolic Architectures (context) - Kung - 1982
103
Theory and Applications of Digital Signal Processing (context) - Rabiner, Gold - 1975
78
Micropipelines (context) - Sutherland
46
High-Speed CMOS Circuit Technique (context) - Yuan, Svensson - 1989
34
Residue Arithmetic and its Application to Computer Technolog.. (context) - Szabo, Tanaka - 1967
34
Residue Number System Arithmetic: Modern Applications in Dig.. (context) - Soderstrand, Jenkins et al. - 1986
31
An Introduction to Error Analysis (context) - Taylor - 1982
21
Introduction to Probability Theory (context) - Hoel, Port et al. - 1971
21
Billion-Transistor Architectures
- Burger, Goodman - 1997
19
A true single-phase-clock dynamic CMOS circuit technique (context) - Yuan, Karlsson et al. - 1987
13
A Spanning Tree Carry Lookahead Adder (context) - Lynch, Earl - 1992
12
Computing the Discrete Fourier transform Using Residue Numbe.. (context) - Cozzens, Finkelstein - 1985
11
Elementary Number Theory (context) - Burton - 1976
11
Large Dynamic Range Computations over Small Finite Rings (context) - Wigley, Jullien et al.
11
Fundamentals of Number Theory (context) - Leveque - 1996
11
Introduction to Number Theory (context) - Nagell - 1981
9
Discrete Mathematics (context) - Biggs - 1989
9
A New Hardware realization of Digital Filters (context) - Peled, Liu - 1974
8
A VLSI Implementation of Residue Adders (context) - Bayoumi, Jullien et al. - 1987
8
High-Speed Signal Processing Using Systolic Arrays Over Fini.. (context) - Taheri, Jullien et al. - 1988
8
Residue Number Scaling and Other Operations Using ROM Arrays (context) - Jullien - 1978
6
High Throughput VLSI DSP Using Replicated Finite Rings (context) - Jullien, Luo et al. - 1996
6
A Low-Overhead Scheme for Testing a Bit Level Finite Ring Sy.. (context) - Jullien, Taheri et al. - 1990
5
Analytical Approach to Sizing NFET Chains (context) - Bizzan, Jullien et al. - 1992
5
An Improved Residue Number System Digital to Analog Converte.. (context) - Soderstand, Vernia et al. - 1983
5
The Use of Residue Number System in the Design of Finite Imp.. (context) - Jenkins, Leon - 1977
4
WoodChuck: A Low-Level Synthesizer for Dynamic Pipelined DSP.. (context) - Jullien, Miller et al. - 1992
4
Taking Moore's Law Into the Next Century
- Hamilton - 1999
4
The Gauss Machine: A Galois-Enhanced Quadratic Residue Numbe.. (context) - Mellott, Smith et al. - 1993
4
Circuit Driven Delay Optimization of EMODL Carry Lookahead A.. (context) - Wang, Wang et al. - 1994
4
Using Redundant Finite Rings for Fault Tolerant Signal Proce.. (context) - Jullien, Bizzan et al. - 1994
4
A Reduced-Complexity Finite Field ALU (context) - Zelniker, Taylor - 1991
3
The VLSI Design of a Single Chip for Multiplication of Integ.. (context) - Chang, Troung et al. - 1985
3
Recent Advances in Residue Number Techniques for recursive D.. (context) - Jenkins - 1979
3
Residue to Binary Conversion for RNS Arithmetic Using Only M.. (context) - Shenoy, Kumaresan - 1988
3
Computing Large Polynomial Products Using Modular Arithmetic (context) - Skavantzos, Mitash - 1992
3
A Look Up Table VLSI Design Methodology for RNS Structures U.. (context) - Bayoumi, Jullien et al. - 1987
3
Rational Numerical System of Residual Classes (context) - Svoboda, Valach - 1957
3
Application of Residue Number Systems to Complex Digital Fil.. (context) - Leung - 1981
2
Viewpoint: Low-power design discipline is more urgent than e.. (context) - Verhofstadt - 1995
2
The Residue Number System (context) - Garner - 1959
2
New Efficient Design for XOR & XNOR Functions on the Transis.. (context) - Wang - 1994
2
Impact of Clock Slope on True Single Phase Clocked (TSPC) Ci.. (context) - Larsson, Svensson - 1994
2
Houghton Mifflin (context) - Godement - 1968
2
Complex Digital Signal Processing Using Quadratic Residue Nu.. (context) - Krishnan, Jullien et al. - 1985
2
On Polynomial Residue Number System (context) - Skavantzos, Taylor - 1991
2
The Design of Dual-Complex Signal Processors Based on Quadra.. (context) - Jenkins, Krogmier - 1987
2
Architectures and Building Blocks for Data Stream DSP Proces.. (context) - Jullien
2
Polynomial Residue Complex Signal Processing (context) - Skavantzos, Stouratis - 1993
2
Introduction to Very Large Scale Integrated Systems (context) - Mead, Conway - 1980
2
Novel Approaches to the Design of VLSI RNS Multipliers (context) - Radhakrishnan, Yuan - 1992
2
Complex Digital Signal Processing Using Quadratic Residue Nu.. (context) - Krishnan, Jullien et al. - 1986
2
Implementation of Multiplication, Modulo a Prime Number, wit.. (context) - Jullien - 1980
2
Complex Digital Signal Processing Over Finite Rings (context) - Jullien, Krishnan et al. - 1987
2
Number Theoretic techniques in Digital Signal Processing (context) - Jullien - 1991
2
Architectures and Implementations for the Polynomial Ring En.. (context) - Bizzan - 1997
2
Robustness of Digital CMOS Techniques with special Emphasis .. (context) - Larsson, Ph - 1993
1
An Algorithm for Complex Approximations in Z[e2<i/8 (context) - Games - 1986
1
A New VLSI Complex Integer Multiplier Which Uses a Quadratic.. (context) - Shyu, Troung et al. - 1987
1
A Fault Tolerant Linear Array for Signal Processing Applicat.. (context) - Smith
1
On Moduli Replication for Residue Arithmetic Computations of.. (context) - Wigley, Jullien - 1990
1
Multipliers for Residue Number Arithmetic Digital Filters (context) - Soderstand - 1977
1
Small Moduli Replications in the MRRNS (context) - Wigley, Jullien et al. - 1990
1
Area Efficient VLSI Computation (context) - Lieserson
1
A High-Speed Low-cost Modulo Pi Multiplier with RNS Arithmet.. (context) - Soderstand, Vernia - 1980
1
A Flexible Modulus Residue Number System for Complex Digital.. (context) - Wigley, Jullien - 1991
1
A New hardware Implementation of Modulo Adders for Residue N.. (context) - Soderstand - 1983
1
Improving Digital Computer Performance Using Residue Number .. (context) - Merrill - 1964
1
Recursive FIR Digital Filter Design Using a ztransform on a .. (context) - Murakami, Reed et al. - 1983
1
A Single Modulus Complex ALU for Signal Processing (context) - Taylor - 1985
1
Encoding Integers into Direct Product Representations of Pol.. (context) - Wigley, Jullien - 1991
1
A Sparse RNS System (context) - Taylor - 1985
1
Digital Filtering Using Complex Mersenne Transforms (context) - Nussbaumer - 1976
1
the Reduction in Multiplicative Complexity Achieved by the P.. (context) - Zelniker, Taylor - 1992
1
Efficient Multiplication over the Finite Fields GF(qm) where.. (context) - Troung, Reed et al. - 1993
1
Implementation of FFT Structures Using the Residue Number Sy.. (context) - Tseng, Jullien et al. - 1974
1
Prevod cisel ze soustavy zbytkovych trid do polyadicke soust.. (context) - Valach - 1956
1
The Modified Quadratic Residue Number System (MQRNS) for Com.. (context) - Krishnan, Jullien et al. - 1986
1
Implementation of Complex Number Theoretic Transforms Using .. (context) - Krishnan, Jullien et al. - 1986
1
VLSI Modular Architectures for Complex Digital Signal Proces.. (context) - Krishnan, Jullien et al. - 1987
1
Computations of Generalized FIR Filter Structure Using the M.. (context) - Krishnan, Miller - 1992
1
Applications of Quadratic-like Complex Residue Number System.. (context) - Soderstrand, Poe - 1984
1
A Memory Compression Scheme for Modular Arithmetic (context) - Huang, Taylor - 1979
1
Silicon Compiler for Implementation of Systolic Arrays Using.. (context) - Jaekel - 1991
1
Realization of Adaptive Digital Filters Using the Fermat Num.. (context) - Lee, Min et al. - 1985
1
A Highly Efficient Residue-Combinatorial Architecture Fir Di.. (context) - Jenkins - 1978
1
Complex Residue Number Arithmetic for High Speed Signal Pro-.. (context) - Jenkins - 1980
1
A Simplified Binary Arithmetic for the Fermat Number Transfo.. (context) - Leibiowitz - 1976
1
A Custom-Designed Integrated Circuit for the Realization of .. (context) - Jenkins, Davidson et al. - 1985
1
VLSI Fault Tolerant Systolic Architectures (context) - Taheri - 1988
1
Linear Filtering Technique for Computing Mersenne and Fermat.. (context) - Nussbaumer - 1977
1
Large Moduli Multipliers for Signal Processing (context) - Taylor - 1981
1
Alternate Memory Compression Schemes for Modular Multiplicat.. (context) - Parhami, Lai - 1993
1
VLSI Digital Signal Processing: Design and Implementation (context) - Parhi - 1999
1
An Autoscale Residue Multiplier (context) - Taylor, Huang - 1982
1
An Overflow-free Residue Multiplier (context) - Taylor - 1983
1
Models of VLSI Implementation of the Residue Number System A.. (context) - Bayoumi, Jullien et al. - 1983
1
A Redundant Code for Modulo 2k+1 Arithmetic (context) - Rao - 1970
1
Binary Logic for residue Arithmetic Using Magnitude Index (context) - Rao - 1970
1
Design and FPGA Implementation of Systolic FIR Filters Using.. (context) - Safiri, Ahmadi et al. - 1996
1
The Basis for Implementation of Additive Operations in the R.. (context) - Sasaki - 1968
1
The Logic of Modulo 2k+1 Adders (context) - Chinal - 1975
1
The Development and Application of High Speed Digital Switch.. (context) - Pup - 1991
1
VLSI Implementation of Residue Adders Based on Binary Adders (context) - Dugdale - 1992
1
A First Course in Abstract Algebra (context) - Fraliegh - 1967
1
A First Course in Rings and Ideals (context) - Burton - 1970
1
Synthesis of Dynamic Computational Blocks for Bit-Level Syst.. (context) - Jullien, Miller et al. - 1994
1
Classical Galois Theory with Examples (context) - Gaal - 1973
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