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Results 1 - 7 of 7

Vectorising a Non-Strict Data-Parallel Functional Language

by Jonathan Hill, Keith M. Clarke, Richard Bornat
"... The role of a vectorising compiler for an imperative language is to transform the for-loops of a program into the vector instructions of a data-parallel machine. In a functional language, constant complexity map is the essence of data-parallelism, where a function is applied to every element of a da ..."
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The role of a vectorising compiler for an imperative language is to transform the for-loops of a program into the vector instructions of a data-parallel machine. In a functional language, constant complexity map is the essence of data-parallelism, where a function is applied to every element of a

Purpose GPU

by Prabhas Chongstitvatana
"... Abstract—This work proposed a design of a processor that unifies the execution of Graphic Processing Units and a general purpose processor. This design is evolved from a simple Graphic Processing softcore where all cores execute the same instruction. The discussion of programming model of vectorised ..."
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of vectorised instructions and the extension to allow multi-cores to run independently is presented. This design is suitable for embedded applications.

Purpose GPU; Programming GPU

by Peera Thontirawong, Prabhas Chongstitvatana
"... Abstract — A GPU-style processor has large amount of processing power on a given die compared to a general purpose processor. However, a Graphic Processing Unit must be executed in lock-step where a group of cores execute the same instruction. This constraint puts a real limitation on programming of ..."
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of a GPU. This work proposed a design of a processor that unifies the execution of Graphic Processing Units and a general purpose processor. The discussion of programming model of vectorised instructions and the extension to allow multicores to run independently is presented. The proposed design

Tuning a Finite Difference Computation for Parallel Vector Processors

by Gerhard Zumbusch
"... Abstract—Current CPU and GPU architectures heavily use data and instruction parallelism at different levels. Floating point operations are organised in vector instructions of increas-ing vector length. For reasons of performance it is mandatory to use the vector instructions efficiently. Several way ..."
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Abstract—Current CPU and GPU architectures heavily use data and instruction parallelism at different levels. Floating point operations are organised in vector instructions of increas-ing vector length. For reasons of performance it is mandatory to use the vector instructions efficiently. Several

Review article IMPORTANCE OF VECTOR PROCESSING

by Naveen Malik, Pankaj Sharma, Naeem Akhtar, Hardeep Rohilla
"... A vector processor, or array processor, is a central processing unit (CPU) that implements an instruction set containing instructions that operate on one-dimensional arrays of data called vectors. This is in contrast to a scalar processor, whose instructions operate on single data items. Vector proc ..."
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in the Sony PlayStation 3 among other applications. Other CPU designs may include some multiple instructions for vector processing on multiple (vectorised) data sets, typically known as MIMD (Multiple Instruction, Multiple Data) and realized with VLIW. Such designs are usually dedicated to a particular

Algorithms, Performance

by Mike Giles, Endre László, István Reguly, Julien Demouth
"... This paper discusses the implementation of one-factor and three-factor PDE models on GPUs. Both explicit and im-plicit time-marching methods are considered, with the lat-ter requiring the solution of multiple tridiagonal systems of equations. Because of the small amount of data involved, one-factor ..."
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-factor models are primarily compute-limited, with a very good fraction of the peak compute capability being achieved. The key to the performance lies in the heavy use of registers and shuffle instructions for the explicit method, and a non-standard hybrid Thomas/PCR algorithm for solving the tridi

APractical Lattice-based Digital Signature Schemes

by unknown authors
"... Digital signatures are an important primitive for building secure systems and are used in most real world security protocols. However, almost all popular signature schemes are either based on the factoring as-sumption (RSA) or the hardness of the discrete logarithm problem (DSA/ECDSA). In the case o ..."
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Digital signatures are an important primitive for building secure systems and are used in most real world security protocols. However, almost all popular signature schemes are either based on the factoring as-sumption (RSA) or the hardness of the discrete logarithm problem (DSA/ECDSA). In the case of classical cryptanalytic advances or progress on the development of quantum computers the hardness of these closely related problems might be seriously weakened. A potential alternative approach is the construction of sig-nature schemes based on the hardness of certain lattices problems which are assumed to be intractable by quantum computers. Due to significant research advancements in recent years, lattice-based schemes have now become practical and appear to be a very viable alternative to number-theoretic cryptography. In this paper we focus on recent developments and the current state-of-the-art in lattice-based digital signatures and provide a comprehensive survey discussing signature schemes with respect to practicality. Additionally, we discuss future research areas that are essential for the continued development of lattice-based cryptography.
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