Results 1  10
of
34,764
Vector Instruction Set Support for Conditional Operations
 In the Proceedings of 27th Intl. Symposium on Computer Architecture
, 2000
"... Vector instruction sets are receiving renewed interest because of their applicability to multimedia. Current multimedia instruction sets use short vectors with SIMD implementations, but long vector, pipelined implementations have a number of advantages and are a logical next step in multimedia ISA d ..."
Abstract

Cited by 29 (0 self)
 Add to MetaCart
Vector instruction sets are receiving renewed interest because of their applicability to multimedia. Current multimedia instruction sets use short vectors with SIMD implementations, but long vector, pipelined implementations have a number of advantages and are a logical next step in multimedia ISA
Customizing Vector Instruction Set Architectures
"... Data Level Parallelism(DLP) can be exploited in order to improve the performance of processors for certain workload types. There are two main application fields that rely on DLP, multimedia and scientific computing. Most of the existing multimedia vector extensions use subword parallelism and wide ..."
Abstract
 Add to MetaCart
data paths for processing independent, mainly integer, values in parallel. On the other hand, classic vector supercomputers rely on efficient processing of large arrays of floating point numbers typically found in scientific applications. In both cases, the selection of an appropriate instruction set
A Microthreaded Chip Multiprocessor with a Vector instruction Set
"... allocation, vector instruction set This paper describes a microthreaded, multiprocessor and presents simulations from a single processor implementation. The microthreaded approach obtains threads from a single context and exploits both vector and instruction level parallelism (ILP). Threaded code ca ..."
Abstract
 Add to MetaCart
allocation, vector instruction set This paper describes a microthreaded, multiprocessor and presents simulations from a single processor implementation. The microthreaded approach obtains threads from a single context and exploits both vector and instruction level parallelism (ILP). Threaded code
Vector LLVA: a Virtual Vector Instruction Set for Media Processing
 In VEE’06
, 2006
"... We present Vector LLVA, a virtual instruction set architecture (VISA) that exposes extensive static information about vector parallelism while avoiding the use of hardwarespecific parameters. We provide both arbitrarylength vectors (for targets that allow vectors of arbitrary length, or where t ..."
Abstract

Cited by 12 (1 self)
 Add to MetaCart
We present Vector LLVA, a virtual instruction set architecture (VISA) that exposes extensive static information about vector parallelism while avoiding the use of hardwarespecific parameters. We provide both arbitrarylength vectors (for targets that allow vectors of arbitrary length, or where
Abstract Vector LLVA: A Virtual Vector Instruction Set for Media Processing ∗
"... We present Vector LLVA, a virtual instruction set architecture (VISA) that exposes extensive static information about vector parallelism while avoiding the use of hardwarespecific parameters. We provide both arbitrarylength vectors (for targets that allow vectors of arbitrary length, or where the ..."
Abstract
 Add to MetaCart
We present Vector LLVA, a virtual instruction set architecture (VISA) that exposes extensive static information about vector parallelism while avoiding the use of hardwarespecific parameters. We provide both arbitrarylength vectors (for targets that allow vectors of arbitrary length, or where
D.: Efficient software implementation of binary field arithmetic using vector instruction sets
 Progress in Cryptology–LATINCRYPT 2010. Lecture Notes in Computer Science
, 2010
"... Abstract. In this paper we describe an efficient software implementation of characteristic 2 fields making extensive use of vector instruction sets commonly found in desktop processors. Field elements are represented in a split form so performancecritical field operations can be formulated in te ..."
Abstract

Cited by 9 (4 self)
 Add to MetaCart
Abstract. In this paper we describe an efficient software implementation of characteristic 2 fields making extensive use of vector instruction sets commonly found in desktop processors. Field elements are represented in a split form so performancecritical field operations can be for
Training Support Vector Machines: an Application to Face Detection
, 1997
"... We investigate the application of Support Vector Machines (SVMs) in computer vision. SVM is a learning technique developed by V. Vapnik and his team (AT&T Bell Labs.) that can be seen as a new method for training polynomial, neural network, or Radial Basis Functions classifiers. The decision sur ..."
Abstract

Cited by 727 (1 self)
 Add to MetaCart
We investigate the application of Support Vector Machines (SVMs) in computer vision. SVM is a learning technique developed by V. Vapnik and his team (AT&T Bell Labs.) that can be seen as a new method for training polynomial, neural network, or Radial Basis Functions classifiers. The decision
An Extended Set of Fortran Basic Linear Algebra Subprograms
 ACM TRANSACTIONS ON MATHEMATICAL SOFTWARE
, 1986
"... This paper describes an extension to the set of Basic Linear Algebra Subprograms. The extensions are targeted at matrixvector operations which should provide for efficient and portable implementations of algorithms for high performance computers. ..."
Abstract

Cited by 523 (68 self)
 Add to MetaCart
This paper describes an extension to the set of Basic Linear Algebra Subprograms. The extensions are targeted at matrixvector operations which should provide for efficient and portable implementations of algorithms for high performance computers.
A Comparison of Methods for Multiclass Support Vector Machines
 IEEE TRANS. NEURAL NETWORKS
, 2002
"... Support vector machines (SVMs) were originally designed for binary classification. How to effectively extend it for multiclass classification is still an ongoing research issue. Several methods have been proposed where typically we construct a multiclass classifier by combining several binary class ..."
Abstract

Cited by 952 (22 self)
 Add to MetaCart
Support vector machines (SVMs) were originally designed for binary classification. How to effectively extend it for multiclass classification is still an ongoing research issue. Several methods have been proposed where typically we construct a multiclass classifier by combining several binary
Support Vector Machine Active Learning with Applications to Text Classification
 JOURNAL OF MACHINE LEARNING RESEARCH
, 2001
"... Support vector machines have met with significant success in numerous realworld learning tasks. However, like most machine learning algorithms, they are generally applied using a randomly selected training set classified in advance. In many settings, we also have the option of using poolbased acti ..."
Abstract

Cited by 735 (5 self)
 Add to MetaCart
Support vector machines have met with significant success in numerous realworld learning tasks. However, like most machine learning algorithms, they are generally applied using a randomly selected training set classified in advance. In many settings, we also have the option of using pool
Results 1  10
of
34,764