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Table 1. Speculation Overheads per Speculative Task

in The Role of Return Value Prediction in Exploiting Speculative Method-Level Parallelism
by Shiwen Hu , Ravi Bhargava, Lizy Kurian John

Table 1: Summary of methods required to support memory dependence speculation.

in Hardware Support for Data Dependence Speculation in Distributed Shared-Memory Multiprocessors Via Cache-block Reconciliation
by Renato J.O. Figueiredo, Jose A.B. Fortes
"... In PAGE 3: ... :::::::::::::::::::: 12 9 Minimum and maximum window size, state size, task#2Fstate size ratio, and #0Dush overheads #28N nodes#29. ::::::::::::::::::::::::::::::::::: 19 10 Comparison of di#0Berent data dependence speculation proposals in terms of the 5 methods summarized in Table1 . HW and SW entries correspond to hardware and software solutions, respectively; H#2FSW corresponds to hybrid solutions.... In PAGE 8: ... Method 2 is necessary to detect when a data dependence violation occurs, in order to trigger the re-issue of dependent instructions #28checkpointed by method 5#29 and the squashing of all incorrectly generated speculative data #28method 4#29. Table 2 presents an overview of the methods provided by a DDSM to support data dependence speculation, following the convention of Table1 . Section 4 presents a detailed description of the data structures and actions associated with each method, and Section 7 compares DDSMs to related approaches based on the classi#0Ccation of Table 1.... In PAGE 24: ... Distributed designs target coarser-grain parallelism, since inter-processor latencies are orders-of-magnitude larger. Table 10 presents a summary of how the #0Cve speculation methods of Table1 are enforced in some of the related designs.... In PAGE 25: ... bu#0Bers HW L1 cache 2 HW VCL HW cache ctrl HW cache ctrl 3 HW on-demand HW bu#0Ber draining HW cache writeback 4 HW gang-clear HW gang-clear H#2FSW gang-clear 5 H#2FSW task descriptor H#2FSW co-proc. handlers H#2FSW handlers IACOMA DDSM Coarse-grain DSM Coarse-grain DSM 1 SW shadow copies HW caches 2 HW directory HW caches+directory 3 SW copying HW reconciliation 4 H#2FSW gang-clear HW cache #0Dush 5 H#2FSW unspeci#0Ced H#2FSW system calls Table1 0: Comparison of di#0Berent data dependence speculation proposals in terms of the 5 meth- ods summarized in Table 1. HW and SW entries correspond to hardware and software solutions, respectively; H#2FSW corresponds to hybrid solutions.... In PAGE 25: ... bu#0Bers HW L1 cache 2 HW VCL HW cache ctrl HW cache ctrl 3 HW on-demand HW bu#0Ber draining HW cache writeback 4 HW gang-clear HW gang-clear H#2FSW gang-clear 5 H#2FSW task descriptor H#2FSW co-proc. handlers H#2FSW handlers IACOMA DDSM Coarse-grain DSM Coarse-grain DSM 1 SW shadow copies HW caches 2 HW directory HW caches+directory 3 SW copying HW reconciliation 4 H#2FSW gang-clear HW cache #0Dush 5 H#2FSW unspeci#0Ced H#2FSW system calls Table 10: Comparison of di#0Berent data dependence speculation proposals in terms of the 5 meth- ods summarized in Table1 . HW and SW entries correspond to hardware and software solutions, respectively; H#2FSW corresponds to hybrid solutions.... In PAGE 26: ...memory data, it does not provide speculation mechanisms to support data-dependence violation detection and recovery #28methods 2, 4 and 5 of Table1 #29. 8 Conclusions and outlook This paper proposes and evaluates a novel hardware-based approach for data-dependence speculation in DSM multiprocessors.... ..."

Table 1. The Model of Speculative Behavior

in Speculative Behavior, Regime-Switching, And Stock Market Crashes
by Simon Van Norden, Huntley Schaller, École Hautes, Études Commercial 1994
"... In PAGE 13: ... 3.3 Estimation and Test Results The estimated parameters for the model of speculative behavior (19)-(21) are presented in the top half of Table1 . The lower part of that table presents likelihood-ratio (LR) test statistics for the restrictions implied by the three quot;stylized fact quot; models of stock returns.... In PAGE 13: ... It therefore seems that the relationship between and bt Rt is highly significant, but nonlinear. Turning now to the three coefficient restrictions implied by the model of speculative behavior, the first is As Table1 illustrates, the point estimate of G15Cb lt;0.... In PAGE 14: ... 0.145). Third, should be negative. Again, this implication is consistent with the G15qb estimates reported in Table1 . Here, however, the statistical evidence is stronger: the p-value for the hypothesis that is 0.... In PAGE 15: ...03 (0.003) Notes: See Table1... In PAGE 16: ...espectively (compared to -0.006, -0.111, and -1.560 for ) and that their significance bA t levels are all roughly the same as before. Estimates of the other parameters are also similar to the estimates in Table1 . It therefore appears that the results are robust to allowing for linearly-predictable variation in dividend growth (and thus for variation... In PAGE 17: ...68 (0.005) Notes: See Table1 for notes. 4.... ..."
Cited by 3

Table 2. Speculative execution in the presence of bugs.

in Prototyping Architectural Support for Program Rollback Using FPGAs ∗
by unknown authors
"... In PAGE 8: ... This will allow the rollback and re- execution of the buggy code section in order to characterize the bug thoroughly by enabling additional instrumentation. Table2 shows that the buggy sections were successfully rolled back in most cases, as shown in column four. That means that the system speculatively executed the entire sec- tion from when the bug occurs to when the bug is detected, then reached the end-speculation instruction, and rolled back.... ..."

Table 2 Negative cycle detection algorithms.

in Practical Fast Clock-Schedule Design Algorithms
by A. Takahashi 2006
"... In PAGE 6: ... Table 6. In Table2 , the computation times to decide whether the target clock-period is feasible or not by using Bellman-Ford shortest path algorithm with and without negative cycle de- tection are shown. The computation times of two algorithms are almost same if there is no negative cycle.... ..."

Table 2 NEGATIVE OBSTACLE DETECTION- NORMAL APPROACH

in Obstacle Detection and Mapping System
by Tsai-hong Hong, Steven Legowik, Marilyn Nashman 1998
"... In PAGE 15: ... In this figure, the ditch is 15 m from the vehicle. Table2 shows the results of the obstacle detection algorithm on the ditch data as the vehicle approached the ditches in the normal direction. The distances, measured in Figure 9 Ditch 1: Raw and processed ladar data (a) (b) 15... ..."
Cited by 6

Table 2 NEGATIVE OBSTACLE DETECTION- NORMAL APPROACH

in Obstacle Detection and Mapping System
by Tsai-hong Hong, Steven Legowik, Marilyn Nashman 1998
"... In PAGE 15: ... In this figure, the ditch is 15 m from the vehicle. Table2 shows the results of the obstacle detection algorithm on the ditch data as the vehicle approached the ditches in the normal direction. The distances, measured in meters, represent the farthest distance at which the algorithm extracted pixels representing Figure 9 Ditch 1: Raw and processed ladar data (a)... ..."
Cited by 6

Table 4: Truncation Amounts for Quotient Digit Speculation, Error Detection and Cor- rection Reducing the Outputs Number of the Selection Logic.

in Division with Speculation of the Quotient Digits
by Gianluca Cornetta

Table 1 Analysis: The Detect Task

in The Man in the Chair: Cornerstone of Global Battlespace Dominance
by Clarence E. Carter, Cdr Clarence, E. Carter, Cynthia L. A. Norman, Maj Ronald, Ronald A. Grundman, Maj Kevin, Kevin G. Kersh, Maj Cynthia, L. A. Norman, Maj Curtis, Curtis O. Piontkowsky, Maj David, David W. Ziegler

Table 4: Speculative messages of DDSM L2 caches.

in Hardware Support for Data Dependence Speculation in Distributed Shared-Memory Multiprocessors Via Cache-block Reconciliation
by Renato J.O. Figueiredo, Jose A.B. Fortes
"... In PAGE 16: ... When the DDSM directory receives a replacement request for a speculatively written block B from processor i,itmulticasts squash requests for processor i and all later processors. The tasks executing in these processors are restarted sequentially; when they access squashed blocks, they request a partially reconciled, program-order copy of the block from the directory #28Rec squash, Table4 #29. Blocks that are re-generated sequentially by squashed tasks are guaranteed to be program-order consistent, and are safe to be committed to main memory without generating violations in the event of a cache replacement.... ..."
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