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Register Windows and User-Space Threads on the SPARC

by David Keppel , 1991
"... Multiple lightweight processes or threads have multiple stacks, and a thread context switch moves execution from one stack to another. On the SPARC 1 architecture, parts of a thread's stack can be cached in register windows while the thread is running. The cached data must be flushed to memor ..."
Abstract - Cited by 9 (0 self) - Add to MetaCart
to memory when the thread is suspended. Doing the flushing both efficiently and correctly can be tricky. This document discusses the implementation of a non-preemptive user-space threads package under SunOS 2 . 1 Introduction Lightweight processes executing in a single address space are called threads

User-Space Solutions to Thread Switching Overhead

by Raoul Bhoedjang, Koen Langendoen , 1995
"... Writing communication software, which spends a significant amount of time on handling incoming messages, is difficult: Active Messages are fast, but awkward to use; traditional popup threads are easy to use, but expensive. Therefore, we have implemented a portable, hybrid upcall mechanism that is ea ..."
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Writing communication software, which spends a significant amount of time on handling incoming messages, is difficult: Active Messages are fast, but awkward to use; traditional popup threads are easy to use, but expensive. Therefore, we have implemented a portable, hybrid upcall mechanism

PTLsim: A cycle accurate full system x86-64 microarchitectural simulator

by Matt T. Yourst - in ISPASS ’07 , 2007
"... In this paper, we introduce PTLsim, a cycle accurate full system x86-64 microprocessor simulator and virtual machine. PTLsim models a modern superscalar out of order x86-64 processor core at a configurable level of detail ranging from RTL-level models of all key pipeline structures, caches and devic ..."
Abstract - Cited by 94 (0 self) - Add to MetaCart
and devices up to full-speed native execution on the host CPU. Unlike other microarchitectural simulators, PTLsim targets the real commercially available x86 ISA, rather than a discontinued architecture with limited tools and an uncertain future. PTLsim supports several flavors: a single threaded userspace

Using Continuations to Implement Thread Management and Communication in Operating Systems

by Richard Draves, Brian N. Bershad, Richard F. Rashid, All W. Dean , 1991
"... We have improved the performance of the Mach 3.0 operating system by redesigning its internal thread and interprocess communication facilities to use continuations as the basis for control transfer. Compared to previous versions of Mach 3.0, our new system consumes 85% less space per thread. Cross- ..."
Abstract - Cited by 118 (12 self) - Add to MetaCart
We have improved the performance of the Mach 3.0 operating system by redesigning its internal thread and interprocess communication facilities to use continuations as the basis for control transfer. Compared to previous versions of Mach 3.0, our new system consumes 85% less space per thread. Cross

Dynamic Deadlock Analysis of Multi-threaded Programs

by Saddek Bensalem, Klaus Havelund - In Shmuel Ur, Eyal Bin, and Yaron Wolfsthal, editors, Haifa Verification Conference, volume 3875 of LNCS , 2005
"... Abstract. This paper presents a dynamic program analysis algorithm that can detect deadlock potentials in a multi-threaded program by examining a single execution trace, obtained by running an instrumented version of the program. The algorithm is interesting because it can identify deadlock potentia ..."
Abstract - Cited by 32 (7 self) - Add to MetaCart
Abstract. This paper presents a dynamic program analysis algorithm that can detect deadlock potentials in a multi-threaded program by examining a single execution trace, obtained by running an instrumented version of the program. The algorithm is interesting because it can identify deadlock

From sequential programs to concurrent threads

by Guilherme Ottoni, Ram Rangan, Adam Stoler, Matthew J. Bridges, David I. August - Computer Architecture Letters, IEEE , 2005
"... Abstract — Chip multiprocessors are of increasing importance due to recent difficulties in achieving higher clock frequencies in uniprocessors, but their success depends on finding useful work for the processor cores. This paper addresses this challenge by presenting a simple compiler approach that ..."
Abstract - Cited by 11 (3 self) - Add to MetaCart
that extracts nonspeculative thread-level parallelism from sequential codes. We present initial results from this technique targeting a validated dual-core processor model, achieving speedups ranging from 9-48 % with an average of 25 % for important benchmark loops over their single-threaded versions. We also

The antiquity of the Sacred Thread

by unknown authors
"... [This is a revised version of an article published in the June 1985 issue of Manashni, the voice of the Zoroastrian Association of NSW, Sydney, Australia. It is to be hoped that my quotations from our scriptures and commentaries will not be misconstrued either as being judgemental or as evocative.] ..."
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[This is a revised version of an article published in the June 1985 issue of Manashni, the voice of the Zoroastrian Association of NSW, Sydney, Australia. It is to be hoped that my quotations from our scriptures and commentaries will not be misconstrued either as being judgemental or as evocative

Combining thread level speculation helper threads and runahead execution

by Polychronis Xekalakis, Nikolas Ioannou, Marcelo Cintra - In Proc. of the 23rd Intnl. Conf. on Supercomputing , 2009
"... With the current trend toward multicore architectures, improved execution performance can no longer be obtained via traditional single-thread instruction level parallelism (ILP), but, instead, via multithreaded execution. Generating thread-parallel programs is hard and thread-level speculation (TLS) ..."
Abstract - Cited by 8 (3 self) - Add to MetaCart
With the current trend toward multicore architectures, improved execution performance can no longer be obtained via traditional single-thread instruction level parallelism (ILP), but, instead, via multithreaded execution. Generating thread-parallel programs is hard and thread-level speculation (TLS

Multi-threading in an Interactive Theorem Prover

by Phil Cook, Phil Cook, Peter Robinson, Peter Robinson , 1999
"... s and compressed postscript files are available via http://svrc.it.uq.edu.au Multi-threading in an Interactive Theorem Prover Phil Cook Peter Robinson Abstract The Ergo theorem prover is an interactive prover that is currently being used by the SVRC for carrying out proofs associated with the ..."
Abstract - Cited by 1 (1 self) - Add to MetaCart
with the development of trusted software. The current version of Ergo is a single-threaded prover. A multi-threaded version would allow many possibilities for improving the effectiveness of the prover. For example, automatic tactics for simple sub-proofs and rule browsers could be run as background threads while

Using a single-threaded object to speed a verified graph pathfinder

by Matthew Wilding - UNIVERSITY OF TEXAS DEPT. OF CS TR , 2000
"... We have written hardware simulators in ACL2 in order to unify highspeed simulators and formal analysis models [2, 7]. The techniques used for these simulators extend to other kinds of software, which we demonstrate in this paper by implementing a much faster version of an algorithm for graph pathfin ..."
Abstract - Cited by 5 (1 self) - Add to MetaCart
We have written hardware simulators in ACL2 in order to unify highspeed simulators and formal analysis models [2, 7]. The techniques used for these simulators extend to other kinds of software, which we demonstrate in this paper by implementing a much faster version of an algorithm for graph
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