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Finding Shuffle Words that Represent Optimal Scheduling of Shared Memory Access
"... Finding shuffle words that represent optimal scheduling of shared memory access This item was submitted to Loughborough University’s Institutional Repository by the/an author. ..."
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Finding shuffle words that represent optimal scheduling of shared memory access This item was submitted to Loughborough University’s Institutional Repository by the/an author.
Time predictable CPU and DMA shared memory access
- In International Conference on Field-Programmable Logic and its Applications (FPL 2007
, 2007
"... In this paper, we propose a first step towards a time pre-dictable computer architecture for single-chip multipro-cessing (CMP). CMP is the actual trend in server and desk-top systems. CMP is even considered for embedded real-time systems, where worst-case execution time (WCET) estimates are of prim ..."
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Cited by 14 (10 self)
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are of primary importance. We attack the prob-lem ofWCET analysis for several processing units access-ing a shared resource (the main memory) by support from the hardware. In this paper, we combine a time predictable Java processor and a direct memory access (DMA) unit with a regular access pattern (VGA
Memory Consistency and Event Ordering in Scalable Shared-Memory Multiprocessors
- In Proceedings of the 17th Annual International Symposium on Computer Architecture
, 1990
"... Scalable shared-memory multiprocessors distribute memory among the processors and use scalable interconnection networks to provide high bandwidth and low latency communication. In addition, memory accesses are cached, buffered, and pipelined to bridge the gap between the slow shared memory and the f ..."
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Cited by 730 (17 self)
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Scalable shared-memory multiprocessors distribute memory among the processors and use scalable interconnection networks to provide high bandwidth and low latency communication. In addition, memory accesses are cached, buffered, and pipelined to bridge the gap between the slow shared memory
Composable memory transactions
- In Symposium on Principles and Practice of Parallel Programming (PPoPP
, 2005
"... Atomic blocks allow programmers to delimit sections of code as ‘atomic’, leaving the language’s implementation to enforce atomicity. Existing work has shown how to implement atomic blocks over word-based transactional memory that provides scalable multiprocessor performance without requiring changes ..."
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Cited by 509 (43 self)
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changes to the basic structure of objects in the heap. However, these implementations perform poorly because they interpose on all accesses to shared memory in the atomic block, redirecting updates to a thread-private log which must be searched by reads in the block and later reconciled with the heap when
A practical constructive scheme for deterministic shared-memory access
- In Proc. 5th ACM Symp. on Parallel Algorithms and Architectures
, 1993
"... Abstract. We present three explicit schemes for distributing M variables among N memory modules, where M = �(N 1.5), M = �(N 2), and M = �(N 3), respectively. Each variable is replicated into a constant number of copies stored in distinct modules. We show that N processors, directly accessing the me ..."
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Cited by 8 (5 self)
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Abstract. We present three explicit schemes for distributing M variables among N memory modules, where M = �(N 1.5), M = �(N 2), and M = �(N 3), respectively. Each variable is replicated into a constant number of copies stored in distinct modules. We show that N processors, directly accessing
Lightweight kernel support for direct shared memory access on a multi-core computer
- In Proceedings of the 1st Workshop on Managed Many-Core Systems
, 2008
"... This paper describes an enhancement to the Catamount lightweight kernel for direct shared memory access between processes running on a multi-core processor as part of a parallel application. Unlike traditional shared memory support for interprocess communication, which involves dynamic memory alloca ..."
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Cited by 2 (1 self)
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This paper describes an enhancement to the Catamount lightweight kernel for direct shared memory access between processes running on a multi-core processor as part of a parallel application. Unlike traditional shared memory support for interprocess communication, which involves dynamic memory
Algorithms for Scalable Synchronization on Shared-Memory Multiprocessors
- ACM Transactions on Computer Systems
, 1991
"... Busy-wait techniques are heavily used for mutual exclusion and barrier synchronization in shared-memory parallel programs. Unfortunately, typical implementations of busy-waiting tend to produce large amounts of memory and interconnect contention, introducing performance bottlenecks that become marke ..."
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Cited by 573 (32 self)
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ag variables, and for some other processor to terminate the spin with a single remote write operation at an appropriate time. Flag variables may be locally-accessible as a result of coherent caching, or by virtue of allocation in the local portion of physically distributed shared memory. We present a
PROPOSAL OF SHARED MEMORY ACCESS METHODS FOR LAMBDA COMPUTING ENVIRONMENT
"... Optical transmission technology is studied actively in order to realize highspeed transmission and broadband networks. However, conventional packetbased switching technology cannot realize the true high quality communication for each connection. Then we propose new λ computing environment which has ..."
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when we use it as a shared memory. As a result, we can show the performance of the proposed method to access the shared memory on photonic networks. 1.
A Practical Constructive Scheme for Deterministic Shared-Memory Access*
"... We present an explicit memory organization scheme for distributing hl data items among N memory modules where M 6 ..."
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We present an explicit memory organization scheme for distributing hl data items among N memory modules where M 6
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