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Semantics of Relaxed Memory Models”.

by Gustavo Federico Petri, Curriculum Vitæ, H. Zhu, G. Petri, S. Jagannathan
"... My research interests lie in the areas of formal methods and programming languages – both in their formal and practical aspects –, as well as parallel programming and distributed systems in general. Education Ph.D. in Computer Science. INRIA – Sophia Antipolis, France (degree granted by the Univer-s ..."
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My research interests lie in the areas of formal methods and programming languages – both in their formal and practical aspects –, as well as parallel programming and distributed systems in general. Education Ph.D. in Computer Science. INRIA – Sophia Antipolis, France (degree granted by the Univer-site ́ de Nice – Sophia Antipolis). Directed by Gérard Boudol. Thesis: “Operational

Predicate Abstraction for Relaxed Memory Models

by Andrei Dan, Yuri Meshman, Martin Vechev, Eran Yahav
"... Abstract. We present a novel approach for predicate abstraction of programs running on relaxed memory models. Our approach consists of two steps. First, we reduce the problem of verifying a program P running on a memory model M to the problem of verifying a program PM that captures an abstraction of ..."
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Abstract. We present a novel approach for predicate abstraction of programs running on relaxed memory models. Our approach consists of two steps. First, we reduce the problem of verifying a program P running on a memory model M to the problem of verifying a program PM that captures an abstraction

Dynamic synthesis for relaxed memory models

by Feng Liu, Nayden Nedev, Nedyalko Prisadnikov, Martin Vechev, Eran Yahav
"... Modern architectures implement relaxed memory models which may reorder memory operations or execute them non-atomically. Special instructions called memory fences are provided, allowing control of this behavior. To implement a concurrent algorithm for a modern architecture, the programmer is forced ..."
Abstract - Cited by 15 (1 self) - Add to MetaCart
Modern architectures implement relaxed memory models which may reorder memory operations or execute them non-atomically. Special instructions called memory fences are provided, allowing control of this behavior. To implement a concurrent algorithm for a modern architecture, the programmer is forced

Partial-Coherence Abstractions for Relaxed Memory Models

by Michael Kuperstein, Martin Vechev, Eran Yahav
"... We present an approach for automatic verification and fence inference in concurrent programs running under relaxed memory models. Verification under relaxed memory models is a hard problem. Given a finite state program and a safety specification, verifying that the program satisfies the specificatio ..."
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We present an approach for automatic verification and fence inference in concurrent programs running under relaxed memory models. Verification under relaxed memory models is a hard problem. Given a finite state program and a safety specification, verifying that the program satisfies

Software transactional memory on relaxed memory models

by Rachid Guerraoui, Thomas A. Henzinger, Vasu Singh - In CAV , 2009
"... Abstract. Pseudo-code descriptions of STMs assume sequentially consistent pro-gram execution and atomicity of high-level STM operations like read, write, and commit. These assumptions are often violated in realistic settings, as STM im-plementations run on relaxed memory models, with the atomicity o ..."
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Abstract. Pseudo-code descriptions of STMs assume sequentially consistent pro-gram execution and atomicity of high-level STM operations like read, write, and commit. These assumptions are often violated in realistic settings, as STM im-plementations run on relaxed memory models, with the atomicity

Relaxed memory models: an operational approach

by Gérard Boudol, Gustavo Petri, Inria Sophia Antipolis , 2009
"... Memory models define an interface between programs written in some language and their implementation, determining which behaviour the memory (and thus a program) is allowed to have in a given model. A minimal guarantee memory models should provide to the programmer is that well-synchronized, that is ..."
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Memory models define an interface between programs written in some language and their implementation, determining which behaviour the memory (and thus a program) is allowed to have in a given model. A minimal guarantee memory models should provide to the programmer is that well

Effective Program Verification for Relaxed Memory Models

by Sebastian Burckhardt, Madanlal Musuvathi
"... Abstract. Program verification for relaxed memory models is hard. The high degree of nondeterminism in such models challenges standard verification techniques. This paper proposes a new verification technique for the most common relaxation, store buffers. Crucial to this technique is the observation ..."
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Abstract. Program verification for relaxed memory models is hard. The high degree of nondeterminism in such models challenges standard verification techniques. This paper proposes a new verification technique for the most common relaxation, store buffers. Crucial to this technique

Testing Concurrent Programs on Relaxed Memory Models

by Jacob Burnim, Koushik Sen, Christos Stergiou
"... High-performance concurrent libraries, such as lock-free data structures and custom synchronization primitives, are notoriously difficult to write correctly. Such code is often implemented without locks, instead using plain loads and stores and low-level operations like atomic compare-and-swaps and ..."
Abstract - Cited by 14 (2 self) - Add to MetaCart
-and-swaps and explicit memory fences. Such code must run correctly despite the relaxed memory model of the underlying compiler, virtual machine, and/or hardware. These memory models may reorder the reads and writes issued by a thread, greatly complicating parallel reasoning. We propose RELAXER, a combination

Relaxed memory models must be rigorous

by Nardelli Peter, Sewell Jaroslav, Sevčík Susmit, Sarkar Scott Owens, Luc Maranget, Mark Batty, Jade Alglave
"... Multiprocessors and high-level languages generally provide only relaxed (non-sequentially-consistent) memory models, to permit performance optimisations. One has to understand these models to program reliable concurrent systems — but they are typically ambiguous and incomplete informal-prose documen ..."
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Multiprocessors and high-level languages generally provide only relaxed (non-sequentially-consistent) memory models, to permit performance optimisations. One has to understand these models to program reliable concurrent systems — but they are typically ambiguous and incomplete informal

Verifying local transformations on relaxed memory models

by Sebastian Burckhardt, Madanlal Musuvathi, Vasu Singh - of Lecture Notes in Computer Science , 2010
"... Abstract. The problem of locally transforming or translating programs without altering their semantics is central to the construction of correct compilers. For concurrent shared-memory programs this task is challenging because (1) concurrent threads can observe transformations that would be undetect ..."
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be undetectable in a sequential program, and (2) contemporary multiprocessors commonly use relaxed memory models that complicate the reasoning. In this paper, we present a novel proof methodology for verifying that a local program transformation is sound with respect to a specific hardware memory model
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