This paper presents the technical decision of tachometer which is realized with program logic. A distinguish feature of the suggestion is the using functional transformation of the number next impulses in order to reach a result in rpm. This way there is no need oft mathematical operations

In this poster, we propose four new heterogeneous programmable logic blocks (PLBs) consisting of a combination of various sizes of look up tables (LUTs), multiplexers (MUXes), and logic gates. We demonstrate that these PLBs offer significant performance and density benefits over more homogeneous

Measuring and utilising the correlation between signal connectivity and signal positioning for FPGAs containing multi-bit building blocks A. Ye and J. Rose 1

This thesis presents a processor and memory-hierarchy prototype based on FPGAs that provides hardware support for program rollback. We use this prototype to demonstrate how compiler- or user-controlled speculative execution can help in debugging production codes. The system is based on a synthesizable VHDL implementation of a 32-bit processor compliant with the SPARC V8 architecture. We conduct experiments on applications with real bugs. The applications run on top of a version of Linux ported to this hardware. Our experiments show that our system is able to successfully execute the buggy code sections speculatively. This allows the thorough characterization of the faulty code through repeated rollback and re-execution. Moreover, the hardware extensions we made to the baseline system increase the hardware resource requirements by less than 4.5%. iii Acknowledgments I would like to thank my adviser, Josep Torrellas, for his technical, moral and financial support. I would also like to thank the IACOMA and PROBE research groups at University of Illinois for valuable discussions and feedback on our research. iv

Abstract – This paper argues towards the usage of

Abstract. The paper presents some hardware solutions for the bit-byte CPU of a PLC, which are oriented for maximum optimisation of data exchange between the CPU processors. The optimisation intends to maximum utilisation of the possibilities given by the two-processor architecture of the CPUs. The key point is preserving high speed of instruction processing by the bit processor, and high functionality of the byte processor. The optimal structure should enable the processors to work concurrently for as much of the tome as possible, and minimise the situations, when one processor has to wait for the other.

Abstract: Modern software systems are becoming increasingly complex and for that reason extremely difficult to develop and maintain. The size of the development team usually depends on the size and complexity of the software system developed in the project. Good coordination and organization of the team is necessary. One of the main problems of software engineering is that it is a relatively new technical discipline, compared to well-established disciplines such as mechanical and electrical engineering. Plenty of software development projects are still performed in an ad-hoc manner and many of them yield bad and unreliable products or even fail to deliver a working software system. Another issue that makes software engineering techniques difficult to standardize and foment their use in a wider range of software development projects is the extremely rapid development of computer hardware on one hand, and development of programming languages and software development environments on the other hand. Nevertheless, in the last three decades, several software engineering modeling languages and computerized tools have been developed and successfully used. In the late sixties and throughout the seventies, procedural programming languages were dominant and thus the modeling languages were also designed

Programmable logic offers an alternative solution for the computationally-intensive functions found in Digital Signal Processing (DSP). Programmable logic can provide increased DSP system performance at reduced system cost. Programmable logic combines the flexibility of a general-purpose DSP plus

Abstract: The design and development of Generic Complex Programmable Logic Device (CPLD) Board is to emphasis on the reduction of the overall design & development life cycle time of the products. Since the Programmable Logic Devices are very flexible, reconfigurable, the same board can

ABSTARCT: Since the industrial revolution took place in 18th century, various improvements have been done in the sector of industry. The sole principle behind it was to reduce the human efforts by means of automation. A Programmable Logic Controller(PLC) has created a huge impact in the field