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Pin: building customized program analysis tools with dynamic instrumentation
- IN PLDI ’05: PROCEEDINGS OF THE 2005 ACM SIGPLAN CONFERENCE ON PROGRAMMING LANGUAGE DESIGN AND IMPLEMENTATION
, 2005
"... Robust and powerful software instrumentation tools are essential for program analysis tasks such as profiling, performance evaluation, and bug detection. To meet this need, we have developed a new instrumentation system called Pin. Our goals are to provide easy-to-use, portable, transparent, and eff ..."
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Cited by 991 (35 self)
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for Linux platforms on four architectures: IA32 (32-bit x86), EM64T (64-bit x86), Itanium R ○ , and ARM. In the ten months since Pin 2 was released in July 2004, there have been over 3000 downloads from its website.
Matlab user’s guide
, 2005
"... This product or document is protected by copyright and distributed under licenses restricting its use, copying, distribution, and decompilation. No part of this product or document may be reproduced in any form by any means without prior written authorization of Sun and its licensors, if any. Portio ..."
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Cited by 535 (0 self)
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of SPARC International, Inc. in the United States and other countries. Products bearing SPARC trademarks are based upon an architecture developed by Sun Microsystems, Inc. Intel is a registered trademark of Intel Corporation. PowerPC is a trademark of International Business Machines Corporation. The OPEN
Mapping the Gnutella network: Properties of large-scale peer-to-peer systems and implications for system design
- IEEE Internet Computing Journal
, 2002
"... Despite recent excitement generated by the peer-to-peer (P2P) paradigm and the surprisingly rapid deployment of some P2P applications, there are few quantitative evaluations of P2P systems behavior. The open architecture, achieved scale, and self-organizing structure of the Gnutella network make it ..."
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Cited by 361 (23 self)
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Despite recent excitement generated by the peer-to-peer (P2P) paradigm and the surprisingly rapid deployment of some P2P applications, there are few quantitative evaluations of P2P systems behavior. The open architecture, achieved scale, and self-organizing structure of the Gnutella network make
Peer-to-Peer Architecture Case Study: Gnutella Network
, 2001
"... Despite recent excitement generated by the P2P paradigm and despite surprisingly fast deployment of some P2P applications, there are few quantitative evaluations of P2P systems behavior. Due to its' open architecture and achieved scale, Gnutella is an interesting P2P architecture case study. Gn ..."
Abstract
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Cited by 274 (1 self)
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Despite recent excitement generated by the P2P paradigm and despite surprisingly fast deployment of some P2P applications, there are few quantitative evaluations of P2P systems behavior. Due to its' open architecture and achieved scale, Gnutella is an interesting P2P architecture case study
Neuronal oscillations in cortical networks.
, 2004
"... Clocks tick, bridges and skyscrapers vibrate, neuronal networks oscillate. Are neuronal oscillations an inevitable by-product, similar to bridge vibrations, or an essential part of the brain's design? Mammalian cortical neurons form behavior-dependent oscillating networks of various sizes, whi ..."
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Cited by 311 (1 self)
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oscillatory bands covering frequencies from approximately 0.05 Hz to 500 Hz The power density of EEG or local field potential is inversely proportional to frequency (f ) in the mammalian cortex (27) These relations between anatomical architecture and oscillatory patterns allow brain operations to be carried
Hierarchical Cooperation Achieves Optimal Capacity Scaling in Ad Hoc Networks
, 2007
"... n source and destination pairs randomly located in an area want to communicate with each other. Signals transmitted from one user to another at distance r apart are subject to a power loss of r −α as well as a random phase. We identify the scaling laws of the information theoretic capacity of the ne ..."
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Cited by 263 (18 self)
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n source and destination pairs randomly located in an area want to communicate with each other. Signals transmitted from one user to another at distance r apart are subject to a power loss of r −α as well as a random phase. We identify the scaling laws of the information theoretic capacity
Analog-to-digital converter survey and analysis
- IEEE Journal on Selected Areas in Communications
, 1999
"... Abstract—Analog-to-digital converters (ADC’s) are ubiquitous, critical components of software radio and other signal processing systems. This paper surveys the state-of-the-art of ADC’s, including experimental converters and commercially available parts. The distribution of resolution versus samplin ..."
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Cited by 263 (0 self)
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sampling rate provides insight into ADC performance limitations. At sampling rates below 2 million samples per second (Ms/s), resolution appears to be limited by thermal noise. At sampling rates ranging from 2 Ms/s to 4 giga samples per second (Gs/s), resolution falls off by 1 bit for every doubling
Caffe: Convolutional architecture for fast feature embedding
, 2014
"... Caffe provides multimedia scientists and practitioners with a clean and modifiable framework for state-of-the-art deep learning algorithms and a collection of reference models. The framework is a BSD-licensed C++ library with Python and MATLAB bindings for training and deploying general-purpose conv ..."
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Cited by 192 (8 self)
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-purpose convolutional neural networks and other deep mod-els efficiently on commodity architectures. Caffe fits indus-try and internet-scale media needs by CUDA GPU computa-tion, processing over 40 million images a day on a single K40 or Titan GPU ( ≈ 2.5 ms per image). By separating model representation from actual
POWER3: Next Generation 64-bit PowerPC Processor Design Authors
"... IBM's new POWER3 microprocessor integrates the high-bandwidth and floating point capabilities of its POWER2 architecture predecessor into a fully scaleable 64-bit PowerPC* symmetric multi-processor (SMP) implementation. Based on PowerPC Architecture*, this microprocessor contains the fundamenta ..."
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IBM's new POWER3 microprocessor integrates the high-bandwidth and floating point capabilities of its POWER2 architecture predecessor into a fully scaleable 64-bit PowerPC* symmetric multi-processor (SMP) implementation. Based on PowerPC Architecture*, this microprocessor contains
FAWN: A Fast Array of Wimpy Nodes
, 2008
"... This paper introduces the FAWN—Fast Array of Wimpy Nodes—cluster architecture for providing fast, scalable, and power-efficient key-value storage. A FAWN links together a large number of tiny nodes built using embedded processors and small amounts (2–16GB) of flash memory into an ensemble capable of ..."
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Cited by 212 (26 self)
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This paper introduces the FAWN—Fast Array of Wimpy Nodes—cluster architecture for providing fast, scalable, and power-efficient key-value storage. A FAWN links together a large number of tiny nodes built using embedded processors and small amounts (2–16GB) of flash memory into an ensemble capable
Results 1 - 10
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3,975