### Table 1: Example of performance characterization Modeling the overall system is beneficial and necessary for the project in multiple ways. Simply relying on existing tools is not enough for the highly heterogeneous system envisaged; the close co-operation of vastly different modules and the development of algorithms for optimization of application mapping with respect to a set of parameters (energy consumption, QoS, etc.) can be considerably eased by the use of a comprehensive system model that combines characterizations provided by the aforementioned tools. As modeling language, SystemC is used because of its flexibility and the wide range of abstraction levels covered. It is suitable for high-level interface definition as well as low- level (nearly) hardware accurate modeling.

"... In PAGE 3: ... For most processing tiles there are tools available to derive the performance figures, but for other processing tiles the performance figures will be derived in the 4S project (either measured or derived from datasheets). Table1 shows an example of process characterizations. In addition to that the inter-process communication primitives have to be annotated with performance characteristics e.... ..."

### Table 2 Definition of heterogeneous network Network

"... In PAGE 2: ... That is, the fourth generation wireless network should be a heterogeneous network that supports multiple broadband wireless access technologies and global roaming across the systems constructed by individual access technologies. Table2 gives a definition of heteroge- neous network. Table 2 Definition of heterogeneous network Network ... ..."

### Table 2 Specifications of the Eleven Heterogeneous Computers Machine

"... In PAGE 12: ... 5.2 Applications A small heterogeneous local network of 11 different Solaris and Linux workstations shown in Table2 is used in the experiments. The network is based on 100 Mbit Ethernet with a switch enabling parallel communications between the computers.... In PAGE 15: ... 7. Determination of a set with relatively few points used to build the speed functions of the processors X2-X5 whose specifications are shown in Table2 . As few as 6 points and 5 points are used to build an efficient speed function for matrix multiplication and LU factorization respectively with deviation approximately 5% from other speed functions built with more number of points.... In PAGE 15: ... Though the absolute speed must be obtained by multiplication of two dense non-square matrices, we observed that our serial version gives almost the same speeds for multiplication of two dense square matrices if the number of elements in a dense non-square matrix is the same as the number of elements in a dense square matrix. This is illustrated in Table 3 for computers X2-X5 whose specifications are shown in Table2 . Thus speed functions of the processors built using dense square matrices will be the same as those built using dense non-square matrices.... In PAGE 17: ... However allocation of a task to these computers, the size of which is greater than 36000000 and 81000000 for matrix-matrix multiplication and LU factorization respectively, will result in severe performance degradation of the parallel application. For each of these two applications, the largest problem size that can be solved on the network of heterogeneous networks shown in Table2 is just the sum of the largest sizes of the tasks that can be solved on each computer. There are three important issues in selecting a set of points to build a speed function of a processor: 1.... In PAGE 18: ... Speeds of the processors are assumed to be zero for problem sizes beyond their upper bounds. multiplication obtained using three sets of 6, 7, and 8 points and speed functions for LU factorization obtained using three sets of 5, 7, and 8 points for the computers X2-X5 whose specifications are shown in Table2 . It can be seen that 6 points and 5 points are enough to build an efficient speed function that fall within acceptable limits of deviation for matrix multiplication and LU factorization respectively.... ..."

### Table 2: Semantic amp; structural data heterogeneity

"... In PAGE 4: ... An example is, Where are all the row crop fields in Dane, Racine, and Eau Claire Counties? A query of this kind is relatively straightforward when using one data set but more difficult when posed over a larger geographic area. Table2 illustrates the heterogeneity of attribute ... In PAGE 4: ... There may be multiple data sets covering all or parts of a geographic area, arising from overlapping jurisdictions. For example, regional planning commissions may overlap county data, and cities are nested within counties, as seen in Table2 with Dane County and the city of Madison. At the other extreme, holes may exist in data sets such as Eau Claire County data that excludes the city of Eau Claire.... ..."

### Table 2: Semantic amp; structural data heterogeneity

"... In PAGE 4: ... An example is, Where are all the row crop fields in Dane, Racine, and Eau Claire Counties? A query of this kind is relatively straightforward when using one data set but more difficult when posed over a larger geographic area. Table2 illustrates the heterogeneity of attribute ... In PAGE 4: ... There may be multiple data sets covering all or parts of a geographic area, arising from overlapping jurisdictions. For example, regional planning commissions may overlap county data, and cities are nested within counties, as seen in Table2 with Dane County and the city of Madison. At the other extreme, holes may exist in data sets such as Eau Claire County data that excludes the city of Eau Claire.... ..."

### Table 6. Execution times of the heterogeneous parallel matrix multiplication for r=64 (in seconds).

2004

Cited by 3

### Table 12: Comparison of Average Intelligibility Index for Video Applications (multiple congested links; heterogeneous video)

2002

"... In PAGE 20: ...2.3 Video Intelligibility Table12 shows intelligibility indices for all video flows. Under WFQ and WFQ+, no intelligible video transmission can be achieved.... ..."

### Table 5: MPEG decoder design using heterogeneous resources .

1999

"... In PAGE 21: ...UM and DISP. Figure 13 shows the control-data ow graph of the MPEG program. We assume that there are implementations of each of these functions on single and multiple embedded processors, DSPs and FPGAs of the testbed. Table5 shows the results of such a mapping for various timing constraints. As can be seen, our MILP algorithm produces results superior to a simple greedy heuristic based mapping.... ..."

Cited by 7

### Table 5: MPEG decoder design using heterogeneous resources

1999

"... In PAGE 21: ...UM and DISP. Figure 13 shows the control-data#0Dow graph of the MPEG program. We assume that there are implementations of each of these functions on single and multiple embedded processors, DSPs and FPGAs of the testbed. Table5 shows the results of such a mapping for various timing constraints. As can be seen, our MILP algorithm produces results superior to a simple greedy heuristic based mapping.... ..."

Cited by 1