Results 1 - 10
of
870
Architecture Characterization of DoD MSRC HPC Platforms
"... This paper outlines the results for a set of low-level, architecture characterization benchmarks that measure the performance of dense numerical computations, access to the memory hierarchy and MPI message passing of three high performance architectures. The machines evaluated are the Cray T3E, IBM ..."
Abstract
- Add to MetaCart
This paper outlines the results for a set of low-level, architecture characterization benchmarks that measure the performance of dense numerical computations, access to the memory hierarchy and MPI message passing of three high performance architectures. The machines evaluated are the Cray T3E, IBM
A Co-occurrence Prior for Continuous Multi-Label Optimization
"... Abstract. To obtain high-quality segmentation results the integration of semantic information is indispensable. In contrast to existing segmentation methods which use a spatial regularizer, i.e. a local interaction between image points, the co-occurrence prior [15] imposes penalties on the co-existe ..."
Abstract
-
Cited by 4 (4 self)
- Add to MetaCart
-dual algorithms, which are highly parallelizable on the GPU. Also, our framework allows isotropic regularizers which do not exhibit grid bias. Experimental results on the MSRC benchmark confirm that the use of co-occurrence priors leads to drastic improvements in segmentation compared to the classical Potts model
Quantitative Analysis of Faults and Failures in a Complex Software System
- IEEE Transactions on Software Engineering
, 2000
"... The dearth of published empirical data on major industrial systems has been one of the reasons that software engineering has failed to establish a proper scientific basis. In this paper we hope to provide a small contribution to the body of empirical knowledge. We describe a number of results from a ..."
Abstract
-
Cited by 208 (6 self)
- Add to MetaCart
for fault prediction; and benchmarking fault data. For example, we found strong evidence that a small number of modules contain most of the faults discovered in pre-release testing, and that a very small number of modules contain most of the faults discovered in operation. However, in neither case
Abstract Architecture Characterization of DoD MSRC HPC Platforms
"... This paper outlines the results for a set of low-level, architecture characterization benchmarks that measure the performance of dense numerical computations, access to the memory hierarchy and MPI message passing of three high performance architectures. The machines evaluated are the Cray T3E, IBM ..."
Abstract
- Add to MetaCart
This paper outlines the results for a set of low-level, architecture characterization benchmarks that measure the performance of dense numerical computations, access to the memory hierarchy and MPI message passing of three high performance architectures. The machines evaluated are the Cray T3E, IBM
Real World Performance of Association Rule Algorithms
- PROCEEDINGS OF THE SEVENTH ACM SIGKDD INTERNATIONAL CONFERENCE ON KNOWLEDGE DISCOVERY AND DATA MINING
, 2001
"... This study compares five well-known association rule algorithms using three real-world datasets and an artificial dataset. The experimental results confirm the performance improvements previously claimed by the authors on the artificial data, but some of these gains do not carry over to the real dat ..."
Abstract
-
Cited by 147 (0 self)
- Add to MetaCart
This study compares five well-known association rule algorithms using three real-world datasets and an artificial dataset. The experimental results confirm the performance improvements previously claimed by the authors on the artificial data, but some of these gains do not carry over to the real
A performance study of software and hardware data prefetching schemes
- In Proceedings of the 21st Annual International Symposium on Computer Architecture
, 1994
"... Prefetching, i.e., exploiting the overlap of processor computations with data accesses, is one of several approaches for tolerating memory latencies. Prefetching can be either hardware-based or software-directed or a combination of both. Hardware-based prefetching, requiring some support unit connec ..."
Abstract
-
Cited by 144 (1 self)
- Add to MetaCart
, the software approach has compile-time information to perform sophisticated prefetching whereas the hardware scheme has the advantage of manipulating dynamic information. The performance results from an instruction-Ievel simulation of four benchmarks confirm these observations. Our simulations show
Benchmark spectral results on the lid-driven cavity flow
- Comp. Fluids
, 1998
"... Abstract—Highly-accurate solutions for the lid-driven cavity flow are computed by a Chebyshev collo-cation method. Accuracy of the solution is achieved by using a substraction method of the leading terms of the asymptotic expansion of the solution of the Navier–Stokes equations in the vicinity of th ..."
Abstract
-
Cited by 65 (0 self)
- Add to MetaCart
of the corners, where the velocity is discontinuous. Critical comparison with former numerical experiments confirms the high-accuracy of the method, and extensive results for the flow at Reynolds number
MonetDB/XQuery: a fast XQuery processor powered by a relational engine
- IN SIGMOD
, 2006
"... Relational XQuery systems try to re-use mature relational data management infrastructures to create fast and scalable XML database technology. This paper describes the main features, key contributions, and lessons learned while implementing such a system. Its architecture consists of (i) a range-bas ..."
Abstract
-
Cited by 135 (26 self)
- Add to MetaCart
system is evaluated on the XMark benchmark up to data sizes of 11 GB. The performance section also provides an extensive comparison of all major XMark results published previously, which confirm that the goal of purely relational XQuery processing, namely speed and scalability, was met.
Local Search Topology in Planning Benchmarks: A Theoretical Analysis
, 2002
"... Many state-of-the-art heuristic planners derive their heuristic function by relaxing the planning task at hand, where the relaxation is to assume that all delete lists are empty. The success of such planners on many of the current benchmarks suggests that in those task's state spaces relaxed go ..."
Abstract
-
Cited by 65 (9 self)
- Add to MetaCart
goal distances yield a heuristic function of high quality. Recent work has revealed empirical evidence confirming this intuition, stating several hypotheses about the local search topology of the current benchmarks, concerning the non-existence of dead ends and of local minima, as well as a limited
Memory Behavior of the SPEC2000 Benchmark Suite
, 2000
"... The SPEC CPU benchmarks are frequently used in computer architecture research. The newly released SPEC'2000 benchmarks consist of fourteen floating point and twelve integer applications. In this paper we present measurements of number of cache misses for all the applications for a variety of ..."
Abstract
-
Cited by 46 (0 self)
- Add to MetaCart
of cache configurations. Prior studies have shown that SPEC benchmarks do not put much stress on the memory system. Our simulation results demonstrate that SPEC'2000 places only modest pressure on the first level caches confirming the results of similar experiments. 1 Introduction SPEC CPU
Results 1 - 10
of
870