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517,370
Fast Kernel MatrixVector Multiplication
, 2004
"... Fast kernel matrixvector multiplication with application to Gaussian process learning ..."
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Fast kernel matrixvector multiplication with application to Gaussian process learning
Parallel Sparse MatrixVector Multiplication
, 1997
"... In this paper we describe an algorithm for unstructured sparse matrixvector multiplication on distributed memory parallel computers. We focus on both local and global computational efficiency, i.e. single processor computational performance and interprocessor communication efficiency. Numerical ex ..."
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Cited by 2 (0 self)
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In this paper we describe an algorithm for unstructured sparse matrixvector multiplication on distributed memory parallel computers. We focus on both local and global computational efficiency, i.e. single processor computational performance and interprocessor communication efficiency. Numerical
Sparse MatrixVector Multiplication on FPGAs
, 2007
"... Floatingpoint Sparse MatrixVector Multiplication (SpMXV) is a key computational kernel in scientific and engineering applications. The poor data locality of sparse matrices significantly reduces the performance of SpMXV on generalpurpose processors, which rely heavily on the cache hierarchy to ac ..."
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Floatingpoint Sparse MatrixVector Multiplication (SpMXV) is a key computational kernel in scientific and engineering applications. The poor data locality of sparse matrices significantly reduces the performance of SpMXV on generalpurpose processors, which rely heavily on the cache hierarchy
Sparse matrixvector multiplication on FPGAs
 In Proceedings of the ACM International Symposium on Field Programmable Gate Arrays
, 2005
"... Sparse matrixvector multiplication (SpMXV) is a key computational kernel widely used in scientific applications and signal processing applications. However, the performance of SpMXV on most modern processors is poor due to the irregular sparsity structure in the matrices. Applicationspecific proce ..."
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Cited by 60 (7 self)
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Sparse matrixvector multiplication (SpMXV) is a key computational kernel widely used in scientific applications and signal processing applications. However, the performance of SpMXV on most modern processors is poor due to the irregular sparsity structure in the matrices. Application
On Improving the Performance of Sparse MatrixVector Multiplication
 In Proceedings of the International Conference on HighPerformance Computing
, 1997
"... We analyze singlenode performance of sparse matrixvector multiplication by investigating issues of data locality and finegrained parallelism. We examine the datalocality characteristics of the compressedsparse row representation and consider improvements in locality through matrix permutation. ..."
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Cited by 28 (0 self)
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We analyze singlenode performance of sparse matrixvector multiplication by investigating issues of data locality and finegrained parallelism. We examine the datalocality characteristics of the compressedsparse row representation and consider improvements in locality through matrix permutation
HYPERGRAPHBASED COMBINATORIAL OPTIMIZATION OF MATRIXVECTOR MULTIPLICATION
, 2009
"... Combinatorial scientific computing plays an important enabling role in computational science, particularly in high performance scientific computing. In this thesis, we will describe our work on optimizing matrixvector multiplication using combinatorial techniques. Our research has focused on two di ..."
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Cited by 2 (0 self)
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Combinatorial scientific computing plays an important enabling role in computational science, particularly in high performance scientific computing. In this thesis, we will describe our work on optimizing matrixvector multiplication using combinatorial techniques. Our research has focused on two
Vector ISA Extension for Sparse MatrixVector Multiplication
"... . In this paper we introduce a vector ISA extension to facilitate sparse matrix manipulation on vector processors (VPs). First we introduce a new Block Based Compressed Storage (BBCS) format for sparse matrix representation and a Blockwise Sparse MatrixVector Multiplication approach. Additionally, ..."
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. In this paper we introduce a vector ISA extension to facilitate sparse matrix manipulation on vector processors (VPs). First we introduce a new Block Based Compressed Storage (BBCS) format for sparse matrix representation and a Blockwise Sparse MatrixVector Multiplication approach. Additionally
On Sparse Matrixvector Multiplication with FPGAbased System
, 2002
"... In this paper we report on our experimentation with the use of FPGAbased system to solve the irregular computation problem of evaluating y = Ax when the matrix A is sparse. The main features of our matrixvector multiplication algorithm are (i) an organization of the operations to suit the FPGAba ..."
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Cited by 5 (0 self)
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In this paper we report on our experimentation with the use of FPGAbased system to solve the irregular computation problem of evaluating y = Ax when the matrix A is sparse. The main features of our matrixvector multiplication algorithm are (i) an organization of the operations to suit the FPGA
Vector ISA Extension for Sparse MatrixVector Multiplication
"... . In this paper we introduce a vector ISA extension to facilitate sparse matrix manipulation on vector processors (VPs). First we introduce a new Block Based Compressed Storage (BBCS) format for sparse matrix representation and a Blockwise Sparse MatrixVector Multiplication approach. Additionally, ..."
Abstract
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. In this paper we introduce a vector ISA extension to facilitate sparse matrix manipulation on vector processors (VPs). First we introduce a new Block Based Compressed Storage (BBCS) format for sparse matrix representation and a Blockwise Sparse MatrixVector Multiplication approach. Additionally
Results 1  10
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517,370