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The Evaluation of Massively Parallel Array Architectures

by Martin C. Herbordt , 1994
"... ..."
Abstract - Cited by 13 (7 self) - Add to MetaCart
Abstract not found

Some Relations Between Massively Parallel Arrays

by Thomas Buchholz, Martin Kutrib , 1996
"... Relations between various models for massively parallel computers are investigated. These are arrays of finite-state machines -- eventually augmented by pushdown storage -- operating synchronously. The architectures differ mainly in how the input is supplied and how the single nodes are interconnect ..."
Abstract - Cited by 10 (9 self) - Add to MetaCart
Relations between various models for massively parallel computers are investigated. These are arrays of finite-state machines -- eventually augmented by pushdown storage -- operating synchronously. The architectures differ mainly in how the input is supplied and how the single nodes

Fractal Image Compression on Massively Parallel Arrays

by Ch. Hufnagl, J. Hämmerle, A. Pommer, A. Uhl, M. Vajtersic , 1997
"... In this paper we introduce and analyze different algorithms for fractal image compression on massively parallel SIMD arrays. Experimental results achieved on a MasPar MP-2 are included. 1 INTRODUCTION Fractal image compression[2, 10] has generated much interest in the image compression community a ..."
Abstract - Cited by 4 (1 self) - Add to MetaCart
In this paper we introduce and analyze different algorithms for fractal image compression on massively parallel SIMD arrays. Experimental results achieved on a MasPar MP-2 are included. 1 INTRODUCTION Fractal image compression[2, 10] has generated much interest in the image compression community

An Asynchronous Cellular Logic Network for Trigger-Wave Image Processing on Fine-Grain Massively Parallel Arrays

by Piotr Dudek, Senior Member - IEEE Trans. Circuits Syst. II , 2006
"... Abstract—Massively parallel processor-per-pixel single-instruc-tion multiple data arrays are being successfully used for early vi-sion applications in smart sensor systems; however, they are inher-ently inefficient when executing algorithms involving propagation of binary signals, such as the geodes ..."
Abstract - Cited by 14 (9 self) - Add to MetaCart
Abstract—Massively parallel processor-per-pixel single-instruc-tion multiple data arrays are being successfully used for early vi-sion applications in smart sensor systems; however, they are inher-ently inefficient when executing algorithms involving propagation of binary signals

Implementation of an Asynchronous Cellular Logic Network as a Co-Processor for a General-Purpose Massively Parallel Array

by unknown authors
"... Abstract — In this paper we present an implementation of an asynchronous cellular processor array that facilitates binary trigger-wave propagations, extensively used in various image processing algorithms. The circuit operates in a continuous-time mode, achieving high operational performance and low ..."
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Abstract — In this paper we present an implementation of an asynchronous cellular processor array that facilitates binary trigger-wave propagations, extensively used in various image processing algorithms. The circuit operates in a continuous-time mode, achieving high operational performance

COCKPIT VIEW VEHICLE GAME SIMULATORS FOR MASSIVE PARALLEL ARRAYS PLATFORM BASED ON NEURAL-FUZZY SYSTEMS

by Felix Pasila , Gregorius S Budhi , Andreas Sutantra , Hans Juwiantho
"... ABSTRACT This research is an extended investigation of using game simulator to the Massive Actuator Array platform. Two kind of prototypes cockpit view game simulators are designed to be implemented to the platform. The two prototypes are Aircraft and ground All-terrain vehicle game simulator. The ..."
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ABSTRACT This research is an extended investigation of using game simulator to the Massive Actuator Array platform. Two kind of prototypes cockpit view game simulators are designed to be implemented to the platform. The two prototypes are Aircraft and ground All-terrain vehicle game simulator

Published online in Wiley Interscience (www.interscience.wiley.com). DOI: 10.1002/cta.679

by Alexey Lopich, Piotr Dudek
"... Asynchronous cellular logic network as a co-processor for a general-purpose massively parallel array ..."
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Asynchronous cellular logic network as a co-processor for a general-purpose massively parallel array

Transmissive nanohole arrays for massively-parallel optical biosensing

by Yanan Wang, Archana Kar, Andrew Paterson, Katerina Kourentzi, Han Le, Paul Ruchhoeft, Richard Willson, Jiming Bao - ACS Photonics
"... ABSTRACT: A high-throughput optical biosensing technique is proposed and demonstrated. This hybrid technique combines optical transmission of nanoholes with colorimetric silver staining. The size and spacing of the nanoholes are chosen so that individual nanoholes can be independently resolved in ma ..."
Abstract - Cited by 1 (0 self) - Add to MetaCart
in massive parallel using an ordinary transmission optical microscope, and, in place of determining a spectral shift, the brightness of each nanohole is recorded to greatly simplify the readout. Each nanohole then acts as an independent sensor, and the blocking of nanohole optical transmission by enzymatic

Computation Of The Continuous Wavelet Transform On Massively Parallel SIMD Arrays

by Manfred Feil, Andreas Uhl, Marian Vajtersic, Marian Vajter Sic , 1999
"... Strategies for computing the continuous wavelet transform on massively parallel SIMD arrays are introduced and discussed. The different approaches are theoretically assessed and the results of implementations on a MasPar MP-2 are compared. Keywords: Continuous wavelet transform, SIMD, massively p ..."
Abstract - Cited by 1 (1 self) - Add to MetaCart
Strategies for computing the continuous wavelet transform on massively parallel SIMD arrays are introduced and discussed. The different approaches are theoretically assessed and the results of implementations on a MasPar MP-2 are compared. Keywords: Continuous wavelet transform, SIMD, massively

CIDDRAM Mixed-Signal Parallel Distributed Array Processor

by Roman Genov, Student Member, Gert Cauwenberghs
"... Abscrocr- We present a mixed-signal distributed VLSI architecture for massively parallel array processing, with fine-grain embedded memory. The three-transistor processing element in the array combines a charge in-jection device (CID) binary multiplier and analog accumulator with em-bedded dynamic r ..."
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Abscrocr- We present a mixed-signal distributed VLSI architecture for massively parallel array processing, with fine-grain embedded memory. The three-transistor processing element in the array combines a charge in-jection device (CID) binary multiplier and analog accumulator with em-bedded dynamic
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