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78
On using lossless compression of debug data in embedded logic analysis
- in Proc. IEEE Int. Test Conf
, 2007
"... The capacity of on-chip trace buffers employed for embedded logic analysis limits the observation window of a debug ex-periment. To increase the debug observation window, we pro-pose a novel architecture for embedded logic analysis based on lossless compression. The proposed architecture is particu- ..."
Abstract
-
Cited by 19 (5 self)
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-larly useful for in-field debugging of custom circuits that have sources of nondeterministic behavior such as asynchronous interfaces. In order to measure the tradeoff between the area overhead and the increase in the observation window, we also introduce a new compression ratio metric. We use this metric
Emstar: a software environment for developing and deploying wireless sensor networks
- In Proceedings of the 2004 USENIX Technical Conference
, 2004
"... Recent work in wireless embedded networked systems has followed heterogeneous designs, incorporating a mixture of elements from extremely constrained 8- or 16-bit “Motes ” to less resourceconstrained 32-bit embedded “Microservers.” Emstar is a software environment for developing and deploying comple ..."
Abstract
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Cited by 194 (26 self)
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complex applications on such heterogeneous networks. Emstar is designed to leverage the additional resources of Microservers by trading off some performance for system robustness in sensor network applications. It enables fault isolation, fault tolerance, system visiblity, in-field debugging, and resource
Assertion Checkers in Verification, Silicon Debug and In-Field Diagnosis
- In Proceedings of the IEEE International Symposium on Quality Electronic Design
, 2007
"... Assertion Based Design, and more specifically, Assertion Based Verification (ABV) is quickly gaining wide acceptance in the design community. Assertions are mainly targeted at functional verification during the design and verification phases. In this paper, we concentrate on the use of assertions in ..."
Abstract
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Cited by 19 (0 self)
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in post-fabrication silicon debug. We develop tools that effi-ciently generate the checkers from assertions, for their inclu-sion in the debug phase. We also detail how a checker gen-erator can be used as a means of circuit design for certain portions of self test circuits, and more generally the design
In-field healing of integration problems with COTS components
- Proc
, 2009
"... Developers frequently integrate complex COTS frame-works and components in software applications. COTS products are often only partially documented, and devel-opers may misuse technologies and introduce integration faults, as witnessed by the many entries in fault repositories. Once identified, comm ..."
Abstract
-
Cited by 12 (1 self)
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, common integration problems and their fixes are usually documented in forums and fault reposito-ries on the Web, but this does not prevent them to occur in the field when COTS products are reused. In this paper, we propose a methodology and a self-healing technology that can reduce the occurrence of in-field
On-Chip Debug Architectures for Improving Observability during Post-Silicon Validation
, 2008
"... Post-silicon validation has become an essential step in the design flow of system-onchip devices for the purpose of identifying and fixing design errors that have escaped pre-silicon verification. To address the limited observability of the circuits during post-silicon validation, embedded logic ana ..."
Abstract
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embedded debug architecture that enables real-time lossless data compression in order to extend the observation window of a debug experiment. The proposed architecture is particularly suitable for in-field debugging on application boards that have sources of non-deterministic behavior, such as asynchronous
ON-CHIP DEBUG ARCHITECTURES FOR Il\IPROVING OBSERVABILITY DURING POST-SILICON VALIDATION ON-CHIP DEBUG ARCHITECTURES FOR Il\IPR0\1ING OBSERVABILITY DURING POST-SILICON VALIDATION BY
, 2008
"... Post-silicon validation has become an essential step in the design flow of system-on-chip devices for the purpose of identifying and fixing design errors that have escaped pre-silicon verification. To address the limited observability of the circuits during post-silicon validation, embedded logic an ..."
Abstract
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embedded debug architecture that enables real-time lossless data compression in order to extend the observation window of a debug ex-periment. The proposed architecture is particularly suitable for in-field debugging on application boards that have sources of non-deterministic behavior, such as asyn
BugRedux: Reproducing Field Failures for In-House Debugging
"... A recent survey conducted among developers of the Apache, Eclipse, and Mozilla projects showed that the ability to recreate field failures is considered of fundamental importance when investigating bug reports. Unfortunately, the information typically contained in a bug report, such as memory dumps ..."
Abstract
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Cited by 23 (2 self)
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dumps or call stacks, is usually insufficient for recreating the problem. Even more advanced approaches for gathering field data and help in-house debugging tend to collect either too little information, and be ineffective, or too much information, and be inefficient. To address these issues, we present
and Debugging]: testing tools
"... Developers of highly configurable performance-intensive software systems often use a type of in-house performance-oriented “regression testing ” to ensure that their modifications have not adversely affected their software’s performance across its large configuration space. Unfortunately, time and r ..."
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and resource constraints often limit developers to in-house testing of a small number of configurations and unreliable extrapolation from these results to the entire configuration space, which allows many performance bottlenecks and sources of QoS degradation to escape detection until systems are fielded
MEMORY DEBUG USING BIST
"... Abstract: Built –in self test (BIST) are best tested in Embedded Memories such as RAMs and ROMs. The use of BIST is for manufacturing or production testing with additional features for diagnostics and debug [1].This paper present a study on memory debug methodology using BIST in system-on-chip (SOC) ..."
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Abstract: Built –in self test (BIST) are best tested in Embedded Memories such as RAMs and ROMs. The use of BIST is for manufacturing or production testing with additional features for diagnostics and debug [1].This paper present a study on memory debug methodology using BIST in system-on-chip (SOC
Reproducing and Debugging Field Failures in House
"... Abstract—As confirmed by a recent survey among developers of the Apache, Eclipse, and Mozilla projects, failures of the software that occur in the field, after deployment, are difficult to reproduce and investigate in house. To address this problem, we propose an approach for in-house reproducing an ..."
Abstract
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Cited by 1 (0 self)
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results are promising and provide evidence that our approach is able to reproduce failures using limited field execution information and help debugging. I. PROBLEM AND MOTIVATION Due to the limitations of in-house quality assurance ac-tivities, and the increasing complexity of software systems,
Results 1 - 10
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