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An Infrastructure for Efficient Synchronization of Asymmetric Threads on Hyper-Threaded Processors

by Nikos Anastopoulos, Nectarios Koziris
"... So far, the privileged instructions MONITOR and MWAIT introduced with Intel Prescott core, have been used mostly for inter-thread synchronization in operating systems code. In a hyper-threaded processor, these instructions offer a “performance-optimized ” way for threads involved in synchronization ..."
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So far, the privileged instructions MONITOR and MWAIT introduced with Intel Prescott core, have been used mostly for inter-thread synchronization in operating systems code. In a hyper-threaded processor, these instructions offer a “performance-optimized ” way for threads involved in synchronization

Physical experimentation with prefetching helper threads on intel’s hyper-threaded processors

by Dongkeun Kim, Steve Shih-wei Liao, Perry H. Wang, Juan Del Cuvillo, Xinmin Tian, Hong Wang, Donald Yeung, Milind Girkar, John P. Shen - InCGO ’04: Proceedings of the international , 2004
"... Pre-execution techniques have received much attention as an effective way of prefetching cache blocks to tolerate the everincreasing memory latency. A number of pre-execution techniques based on hardware, compiler, or both have been proposed and studied extensively by researchers. They report promis ..."
Abstract - Cited by 25 (0 self) - Add to MetaCart
promising results on simulators that model a Simultaneous Multithreading (SMT) processor. In this paper, we apply the helper threading idea on a real multithreaded machine, i.e., Intel Pentium 4 processor with Hyper-Threading Technology, and show that indeed it can provide wall-clock speedup on real silicon

Physical Experimentation with Prefetching Helper Threadson Intels Hyper-Threaded Processors Dongkeun Kim1,4, Steve Shih-wei Liao1, Perry H. Wang1, Juan del Cuvillo2Xinmin Tian

by Xiang Zou, Hong Wang, Donald Yeung, Milind Girkar, John P. Shen
"... ..."
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Abstract not found

Exploring the Effects of Hyper-Threading on Parallel Simulation

by Luciano Bononi, Michele Bracuto, Gabriele D'Angelo, Lorenzo Donatiello - PROCEEDINGS OF THE 10-TH ACM/IEEE INTERNATIONAL SYMPOSIUM ON DISTRIBUTED SIMULATION AND REAL TIME APPLICATIONS (DS-RT 2006)
"... This paper illustrates the effects of the Hyper-Threading processor technology on the runtime performance of a parallel and distributed simulation middleware. A preliminary analysis of the middleware design and execution parameters is given to identify the tuning parameters and to evaluate the scala ..."
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This paper illustrates the effects of the Hyper-Threading processor technology on the runtime performance of a parallel and distributed simulation middleware. A preliminary analysis of the middleware design and execution parameters is given to identify the tuning parameters and to evaluate

Is Intel’s Hyper-Threading Technology Worth the Extra Money to the Average User?

by Andrew Murray
"... In the mid-1990’s, Intel Corporation decided to use symmetric multiprocessing (SMP) in order to increase the number of instructions that could execute simultaneously by putting more than one processor on a motherboard. This idea increased the overall performance of a system, but it was too expensive ..."
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and is called hyper-threading technology. This paper compares SMP to SMT and shows how the two technologies as similar, but very different. It then goes on to describe the hyper-threading technology in a little more detail and shows how hyper-threading compared to non-hyper-threading processors against some

Hyper-Threading Technology: Impact on

by Compute-Intensive Workloads William , 2002
"... Intel's recently introduced Hyper-Threading Technology promises to increase application- and system-level performance through increased utilization of processor resources. It achieves this goal by allowing the processor to simultaneously maintain the context of multiple instruction streams and ..."
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Intel's recently introduced Hyper-Threading Technology promises to increase application- and system-level performance through increased utilization of processor resources. It achieves this goal by allowing the processor to simultaneously maintain the context of multiple instruction streams

Performance implications of hyper-threading

by Yiping Ding, Ethan Bolker, Arjun Kumar - In Proc. CMG , 2003
"... Intel’s recently introduced Hyper-Threading Technology (HTT) makes a single physical processor appear as two logical processors. Operating systems and applications can schedule processes or threads on those logical processors. The performance impact of HTT varies, depending on the nature of the appl ..."
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Intel’s recently introduced Hyper-Threading Technology (HTT) makes a single physical processor appear as two logical processors. Operating systems and applications can schedule processes or threads on those logical processors. The performance impact of HTT varies, depending on the nature

Characterizing the Performance of Data Management Systems on Hyper-Threaded Architectures

by Wessam Hassanein, Layali Rashid, Maryam Mehri, Moustafa Hammad - Proceedings of the 18th International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD , 2006
"... As the information acquisition and processing applications take greater roles in our everyday life, database management systems are growing in importance. Database management systems have traditionally exhibited poor cache performance and large memory footprints, therefore performing only at a fract ..."
Abstract - Cited by 1 (0 self) - Add to MetaCart
fraction of their ideal execution and exhibiting low processor utilization. Previous research has studied the memory system of database management systems (DBMSs) on research-based SMT processors. Recently, several differences have been noted between the real hyper-threaded architecture implemented

Analyzing the Effects of Hyper-threading on the Performance of Data Management Systems

by Wessam M. Hassanein, Layali K. Rashid, Moustafa A. Hammad
"... Abstract ◊ As information processing applications take greater roles in our everyday life, database management systems (DBMSs) are growing in importance. DBMSs have traditionally exhibited poor cache performance and large memory footprints, therefore performing only at a fraction of their ideal exec ..."
Abstract - Cited by 1 (0 self) - Add to MetaCart
execution and exhibiting low processor utilization. Previous research has studied the memory system of DBMSs on research-based simultaneous multithreading (SMT) processors. Recently, several differences have been noted between the real hyper-threaded architecture implemented by the Intel Pentium 4

Performance Characterization of Java Applications on SMT Processors

by Wei Huang, Jiang Lin, Zhao Zhang, J. Morris Chang
"... As Java is emerging as one of the major programming languages in software development, studying how Java applications behave on recent SMT processors is of great interest. This paper characterizes the performance of Java applications on an Intel Pentium 4 Hyper-Threading processor. Using the perform ..."
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As Java is emerging as one of the major programming languages in software development, studying how Java applications behave on recent SMT processors is of great interest. This paper characterizes the performance of Java applications on an Intel Pentium 4 Hyper-Threading processor. Using
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