Results 1 - 10 of 4,544

Microprocessor Pipeline Energy Analysis

by Karthik Natarajan, Heather Hanson, Stephen W. Keckler, Charles R. Moore, Doug Burger , 2003
"... The increase in high-performance microprocessor power consumption is due in part to the large power overhead of wideissue, highly speculative cores. Microarchitectural speculation, such as branch prediction, increases instruction throughput but carries a power burden due to wasted power for mis-spe ..."
Abstract - Cited by 15 (4 self) - Add to MetaCart
The increase in high-performance microprocessor power consumption is due in part to the large power overhead of wideissue, highly speculative cores. Microarchitectural speculation, such as branch prediction, increases instruction throughput but carries a power burden due to wasted power for mis

Dynamic Thermal Management for High-Performance Microprocessors

by David Brooks, Margaret Martonosi - In Proceedings of the 7th IEEE Symposium on High-Performance Computer Architecture , 2001
"... With the increasing clock rate and transistor count of today’s microprocessors, power dissipation is becoming a critical component of system design complexity. Thermal and power-delivery issues are becoming especially critical for high-performance computing systems. In this work, we investigate dyna ..."
Abstract - Cited by 333 (5 self) - Add to MetaCart
With the increasing clock rate and transistor count of today’s microprocessors, power dissipation is becoming a critical component of system design complexity. Thermal and power-delivery issues are becoming especially critical for high-performance computing systems. In this work, we investigate

Reducing Power in High-performance Microprocessors

by Vivek Tiwari, Deo Singh, Suresh Rajgopal, Gaurav Mehta, Rakesh Patel, Franklin Baez - In Design Automation Conference
"... Power consumption has become one of the biggest challenges in high-performance microprocessor design. The rapid increase in the complexity and speed of each new CPU generation is outstripping the benefits of voltage reduction and feature size scaling. Designers are thus continuously challenged to co ..."
Abstract - Cited by 89 (0 self) - Add to MetaCart
Power consumption has become one of the biggest challenges in high-performance microprocessor design. The rapid increase in the complexity and speed of each new CPU generation is outstripping the benefits of voltage reduction and feature size scaling. Designers are thus continuously challenged

Run-time Power Estimation in High-Performance Microprocessors

by Russ Joseph, Margaret Martonosi , 2001
"... Power concerns are becoming increasingly pressing in highperformance processors. Building power-aware and even power-adaptive computer architectures requires being able to track power consumption and attribute energy consumption to the portions of the chip that are responsible for it. ..."
Abstract - Cited by 111 (7 self) - Add to MetaCart
Power concerns are becoming increasingly pressing in highperformance processors. Building power-aware and even power-adaptive computer architectures requires being able to track power consumption and attribute energy consumption to the portions of the chip that are responsible for it.

Versatile Low Power Media Access for Wireless Sensor Networks

by Joseph Polastre, Jason Hill, David Culler , 2004
"... We propose B-MAC, a carrier sense media access protocol for wireless sensor networks that provides a flexible interface to obtain ultra low power operation, effective collision avoidance, and high channel utilization. To achieve low power operation, B-MAC employs an adaptive preamble sampling scheme ..."
Abstract - Cited by 1099 (19 self) - Add to MetaCart
We propose B-MAC, a carrier sense media access protocol for wireless sensor networks that provides a flexible interface to obtain ultra low power operation, effective collision avoidance, and high channel utilization. To achieve low power operation, B-MAC employs an adaptive preamble sampling

Reducing Power in High-performance Microprocessors

by unknown authors
"... Power consumption has become one of the biggest challenges in high-performance microprocessor design. The rapid increase in the complexity and speed of each new CPU generation is outstripping the benefits of voltage reduction and feature size scaling. Designers are thus continuously challenged to co ..."
Abstract - Add to MetaCart
Power consumption has become one of the biggest challenges in high-performance microprocessor design. The rapid increase in the complexity and speed of each new CPU generation is outstripping the benefits of voltage reduction and feature size scaling. Designers are thus continuously challenged

Managing the impact of increasing microprocessor power consumption.

by Stephen H Gunther , Douglas M Carmean - In Intel Technology Journal, First Quarter , 2001
"... ABSTRACT The power dissipation of modern processors has been rapidly increasing along with increasing transistor count and clock frequencies. At the same time, there is a growing disparity between the maximum power consumption of a processor and the "typical" power consumed by that proces ..."
Abstract - Cited by 167 (0 self) - Add to MetaCart
consumption, while retaining a high level of reliability requires attention at all stages of the design. In the case of the Pentium ® 4 processor, the design team focused from the beginning on reducing power consumption without negatively impacting either the performance or reliability of the processor in any

Fetch Slot/Map Issue Execute Writeback/Commit Integer

by Karthik Natarajan, Heather Hanson, Stephen W. Keckler, Charles R. Moore, Doug Burger , 2003
"... The increase in high-performance microprocessor power consumption is due in part to the large power overhead of wide-issue, highly speculative cores. Microarchitectural speculation, such as branch prediction, increases instruction throughput but carries a power burden due to wasted power for misspec ..."
Abstract - Add to MetaCart
The increase in high-performance microprocessor power consumption is due in part to the large power overhead of wide-issue, highly speculative cores. Microarchitectural speculation, such as branch prediction, increases instruction throughput but carries a power burden due to wasted power

Multiprocessor Scheduling to Reduce Leakage Power

by Pepijn Langen, Ben Juurlink, Stamatis Vassiliadis
"... Abstract — In contemporary and future embedded as well as high-performance microprocessors, power consumption is one of the most important design considerations. Because in current technologies the dynamic power consumption dominates the static power consumption, voltage scaling is an effective tech ..."
Abstract - Cited by 1 (0 self) - Add to MetaCart
Abstract — In contemporary and future embedded as well as high-performance microprocessors, power consumption is one of the most important design considerations. Because in current technologies the dynamic power consumption dominates the static power consumption, voltage scaling is an effective

Nimrod/G: An architecture for a resource management and scheduling system in a global computational Grid

by Rajkumar Buyya, David Abramson, Jonathan Giddy - PROCEEDINGS OF THE 4TH INTERNATIONAL CONFERENCE ON HIGH PERFORMANCE COMPUTING IN ASIA-PACIFIC REGION (HPC ASIA 2000) , 2000
"... Abstract- The availability of powerful microprocessors and high-speed networks as commodity components has enabled high performance computing on distributed systems (wide-area cluster computing). In this environment, as the resources are usually distributed geographically at various levels (departme ..."
Abstract - Cited by 406 (70 self) - Add to MetaCart
Abstract- The availability of powerful microprocessors and high-speed networks as commodity components has enabled high performance computing on distributed systems (wide-area cluster computing). In this environment, as the resources are usually distributed geographically at various levels
Results 1 - 10 of 4,544