Results 1 - 10 of 47,150

High-Level Data Races

by Cyrille Artho, Klaus Havelund, Armin Biere - JOURNAL ON SOFTWARE TESTING, VERIFICATION & RELIABILITY (STVR , 2003
"... Data races are a common problem in concurrent programming. Experience shows that the notion of data race is not powerful enough to capture certain types of inconsistencies occurring in practice. In this paper we investigate data races on a higher abstraction layer. This enables us to detect incon ..."
Abstract - Cited by 84 (19 self) - Add to MetaCart
Data races are a common problem in concurrent programming. Experience shows that the notion of data race is not powerful enough to capture certain types of inconsistencies occurring in practice. In this paper we investigate data races on a higher abstraction layer. This enables us to detect

Bit-Stuffing Rate in the High-Level Data Link Control (HDLC) Protocol

by Philip Branch, Sebastian Z
"... simulation of the frequency with which bit stuffing occurs in the High-Level Data Link Control (HDLC) protocol. Keywords- HDLC, Bit stuffing I. ..."
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simulation of the frequency with which bit stuffing occurs in the High-Level Data Link Control (HDLC) protocol. Keywords- HDLC, Bit stuffing I.

Transforming High-Level Data-Parallel Programs into Vector Operations

by Jan F. Prins, Daniel W. Palmer - Proceedings Principles and Practices of Parallel Programming 93, ACM , 1993
"... Fully-parallel execution of a high-level data-parallel language based on nested sequences, higher order functions and generalized iterators can be realized in the vector model using a suitable representation of nested sequences and a small set of transformational rules to distribute iterators throug ..."
Abstract - Cited by 54 (21 self) - Add to MetaCart
Fully-parallel execution of a high-level data-parallel language based on nested sequences, higher order functions and generalized iterators can be realized in the vector model using a suitable representation of nested sequences and a small set of transformational rules to distribute iterators

Efficient Compilation of High-Level Data Parallel Algorithms

by Dan Suciu, Val Tannen - In Proceedings of the ACM Symposium on Parallel Algorithms and Architectures , 1994
"... We present a high-level parallel calculus for nested sequences, NSC, offered as a possible theoretical "core" of an entire class of collection-oriented parallel languages. NSC is based on while-loops as opposed to general recursion. A formal, machine independent definition of the parallel ..."
Abstract - Cited by 16 (1 self) - Add to MetaCart
We present a high-level parallel calculus for nested sequences, NSC, offered as a possible theoretical "core" of an entire class of collection-oriented parallel languages. NSC is based on while-loops as opposed to general recursion. A formal, machine independent definition

High-Level Data Parallel Programming in Promoter

by Matthias Besch, Hua Bi, Peter Enskonatus, Gerd Heber, Matthias Wilhelmi - In Proc. Second International Workschop on High-level Parallel Programming Models and Supportive Environments HIPS'97 , 1997
"... Implementing realistic scientific applications on parallel platforms requires a high--level, problem--adequate and flexible programming environment. The hybrid system PRO- MOTER pursues a two--level approach allowing easy and flexible programming at both language and library levels. The core concep ..."
Abstract - Cited by 12 (1 self) - Add to MetaCart
Implementing realistic scientific applications on parallel platforms requires a high--level, problem--adequate and flexible programming environment. The hybrid system PRO- MOTER pursues a two--level approach allowing easy and flexible programming at both language and library levels. The core

High--Level Data Parallel Programming in Promoter

by Matthias Besch Hua, Hua Bi, Peter Enskonatus, Gerd Heber, Matthias Wilhelmi - In Proc. Second International Workschop on High-level Parallel Programming Models and Supportive Environments HIPS'97 , 1997
"... Implementing realistic scientific applications on parallel platforms requires a high--level, problem--adequate and flexible programming environment. The hybrid system PRO- MOTER pursues a two--level approach allowing easy and flexible programming at both language and library levels. The core concept ..."
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Implementing realistic scientific applications on parallel platforms requires a high--level, problem--adequate and flexible programming environment. The hybrid system PRO- MOTER pursues a two--level approach allowing easy and flexible programming at both language and library levels. The core

High-Level Data Path Synthesis for Testability

by Tianruo Yang , 1997
"... This paper presents a high-level test synthesis algorithm for data path allocation under a given schedule. Data path allocation is achieved by a controllability /observability balance allocation technique whose basic idea is to fold nodes (modules and registers) with good controllability and bad obs ..."
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This paper presents a high-level test synthesis algorithm for data path allocation under a given schedule. Data path allocation is achieved by a controllability /observability balance allocation technique whose basic idea is to fold nodes (modules and registers) with good controllability and bad

High-Level Data Communication Optimization for Reconfigurable Systems

by unknown authors
"... Widespread adoption of reconfigurable devices requires system level synthesis techniques to take an application written in a high level language and map it to the reconfigurable device. This paper describes methods for synthesizing the internal representation of a compiler into a hardware descriptio ..."
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Widespread adoption of reconfigurable devices requires system level synthesis techniques to take an application written in a high level language and map it to the reconfigurable device. This paper describes methods for synthesizing the internal representation of a compiler into a hardware

High-Level Data Communication Optimization for Reconfigurable Systems

by Adam Kaplan, Majid Sarrafzadeh, Ryan Kastner - Workshop on Software Support for Reconfigurable Systems (SSRS , 2003
"... This paper describes methods for synthesizing the internal representation of a compiler into a hardware description language in order to program reconfigurable hardware devices. We demonstrate the usefulness of static single assignment (SSA) in reducing the amount of data communication in the hardwa ..."
Abstract - Cited by 1 (0 self) - Add to MetaCart
This paper describes methods for synthesizing the internal representation of a compiler into a hardware description language in order to program reconfigurable hardware devices. We demonstrate the usefulness of static single assignment (SSA) in reducing the amount of data communication

MemPick: High-Level Data Structure Detection in C/C++ Binaries

by Istvan Haller, Asia Slowinska, Herbert Bos
"... Abstract—Many existing techniques for reversing data struc-tures in C/C++ binaries are limited to low-level programming constructs, such as individual variables or structs. Unfortu-nately, without detailed information about a program’s pointer structures, forensics and reverse engineering are exceed ..."
Abstract - Cited by 1 (0 self) - Add to MetaCart
are exceedingly hard. To fill this gap, we propose MemPick, a tool that detects and classifies high-level data structures used in stripped binaries. By analyzing how links between memory objects evolve throughout the program execution, it distinguishes between many commonly used data structures, such as singly
Results 1 - 10 of 47,150