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On a Ternary Model of Gate Networks
 IEEE Transactions on Computers
, 1979
"... AbstractIn this paper we formalize a ternary model which is being used to study the behavior of binary sequential gate networks. We first describe a binary model which is capable of a detailed description of network behavior, but involves a number ofsteps that grows exponentially in the number of g ..."
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Cited by 18 (4 self)
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AbstractIn this paper we formalize a ternary model which is being used to study the behavior of binary sequential gate networks. We first describe a binary model which is capable of a detailed description of network behavior, but involves a number ofsteps that grows exponentially in the number
Practical approach to asynchronous gate networks
"... In analysing sequential gate networks one must take into account the propagation delay of each gate. In conventional methods, state variables are associated with feedback loops, and a flow table based on these variables is constructed. This flow table may be incorrect if hazards are present, and an ..."
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In analysing sequential gate networks one must take into account the propagation delay of each gate. In conventional methods, state variables are associated with feedback loops, and a flow table based on these variables is constructed. This flow table may be incorrect if hazards are present
Learning Concepts by Synthesizing Minimal Threshold Gate Networks
, 1991
"... We propose a new methodology for the synthesis of twolevel networks of threshold gates based on techniques related to the ones used in the logic synthesis of digital networks. The proposed approach starts with a large network that performs the desired mapping and reduces its size by applying ..."
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Cited by 1 (1 self)
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We propose a new methodology for the synthesis of twolevel networks of threshold gates based on techniques related to the ones used in the logic synthesis of digital networks. The proposed approach starts with a large network that performs the desired mapping and reduces its size by applying
Elementary Gates for Quantum Computation
, 1995
"... We show that a set of gates that consists of all onebit quantum gates (U(2)) and the twobit exclusiveor gate (that maps Boolean values (x, y)to(x, x⊕y)) is universal in the sense that all unitary operations on arbitrarily many bits n (U(2 n)) can be expressed as compositions of these gates. We in ..."
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Cited by 280 (11 self)
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constructions of quantum computational networks. We derive upper and lower bounds on the exact number of elementary gates required to build up a variety of two and threebit quantum gates, the asymptotic number required for nbit DeutschToffoli gates, and make some observations about the number required
LSAT  An Algorithm for the Synthesis of Two Level Threshold Gate Networks
 IN PROCEEDINGS OF ICCAD91
, 1991
"... We present an algorithm for the synthesis of twolevel threshold gate networks inspired in techniques used in classical twolevel minimization of logic circuits. We specifically address a restricted version of the problem where the on and off set rainterms are explicitly listed. Experimental results ..."
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Cited by 11 (2 self)
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We present an algorithm for the synthesis of twolevel threshold gate networks inspired in techniques used in classical twolevel minimization of logic circuits. We specifically address a restricted version of the problem where the on and off set rainterms are explicitly listed. Experimental results
Faulttolerant logical gate networks for css codes,” Phys
 Rev. A
"... Faulttolerant logical operations for qubits encoded by CSS codes are discussed, with emphasis on methods which apply to codes of high rate, encoding k qubits per block with k> 1. It is shown that the logical qubits within a given block can be prepared by a single recovery operation in any state ..."
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Cited by 9 (0 self)
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whose stabilizer generator separates into X and Z parts. Optimized methods to move logical qubits around and to achieve controllednot and Toffoli gates are discussed. It is found that the number of timesteps required to complete a faulttolerant quantum computation is the same when k> 1 as when k
Synthesis of Hazardfree Customized CMOS ComplexGate Networks Under MultipleInput Changes Abstract
"... This paper addresses the problem of realizing hazardfree singleoutput Boolean functions through a network of customized complex CMOS gates tailored to a given asynchronouscontroller specification. A customized CMOS gate network can either be a single CMOS gate or a multilevel network of CMOS gates. ..."
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This paper addresses the problem of realizing hazardfree singleoutput Boolean functions through a network of customized complex CMOS gates tailored to a given asynchronouscontroller specification. A customized CMOS gate network can either be a single CMOS gate or a multilevel network of CMOS gates
Towards practical biomolecular computers using microfluidic deoxyribozyme logic gate networks
"... We propose a way of implementing a biomolecular computer in the laboratory using deoxyribozyme logic gates inside a microfluidic reaction chamber. We build upon our previous work, which simulated the operation of a deoxyribozymebased flipflop and oscillator in a continuous stirredtank reactor (C ..."
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Cited by 4 (1 self)
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We propose a way of implementing a biomolecular computer in the laboratory using deoxyribozyme logic gates inside a microfluidic reaction chamber. We build upon our previous work, which simulated the operation of a deoxyribozymebased flipflop and oscillator in a continuous stirredtank reactor
Development of Multisensor Fusion Techniques with Gating Networks Applied to Reentry Vehicles
, 2003
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Results 1  10
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3,177