Using a RISC processor to drive a simple frame buffer yields good 2D color graphics performance. But processor, memory, and bus architectures can prevent processors from saturating video RAM bandwidth. The smart frame buffer is a small cheap gate array that makes full memory bandwidth available

Algorithms for approximately optimal quantization of color images are discussed. The distortion measure used is the distance in RGB space. These algorithms are used to compute the color map for low-depth frame buffers in order to allow high-quality static images to be displayed. It is demonstrated

Figure 1. Our method can rasterize a color image using only two frame-buffer chan-nels by interleaving the chrominance components in a checkerboard pattern. The final image is reconstructed using an edge-directed demosaicing filter. The compression error, visualized in the inset, is negligible

Abstract—Frame buffer power consumption and bandwidth re-quirement are two critical design issues in MPEG video decoders due to the overwhelming amount of frame data accesses. This paper proposes a reusable macroblock detector (RMD) which exploits the characteristic of a stationary macroblock (MB

research relevant to the design and application of high performance scientific computers. We test our ideas by designing, building, and using real systems. The systems we build are research prototypes; they are not intended to become products. There is a second research laboratory located in Palo Alto, the Systems Research Center (SRC). Other Digital research groups are located in Paris (PRL) and in Cambridge,

, microphones) transmitting directly to sink devices (frame buffers, speakers) without involving an intermediate processor. This approach saves communication bandwidth and processor cycles. Further, it reduces latency and also latency jitter. Unfortunately, systems in use today do not support this kind

This paper describes a fast algorithm for the volume conversion and rendering of CSG models constructed from both geometric and volumetric primitives. Using 3D texture mapping and frame buffer pixel operations, the algorithm can interactively generate a binary volume of the CSG model. The result

A multiple-port, distributed frame buffer has been recently proposed to support parallel rendering on multicomputers. This paper describes an implementation of such a distributed frame buffer for the Intel Paragon routing network, and reports its performance results. We have conducted several

Despite the limited power available in a batteryoperated hand-held device, a display system must still have an enough resolution and sufficient color depth to deliver the necessary information. We introduce some methodologies for frame buffer compression that efficiently reduce the power

Parallel rendering on multicomputers involves the parallelization of geometry processing, rasterization and composition. A known approach to support the back end of parallel rendering on multicomputers is to connect a multiport frame buffer directly to the multicomputer routing network to take