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How Fast Will the Flip Flop?
 In Proceedings of the 1994 International Symposium on Advanced Research in Asynchronous Circuits and Systems
, 1994
"... This paper describes an experimental investigation of the application of dynamical systems theory to the verification of digital VLSI circuits. We analyze the behavior of a ninetransistor toggle element using a simple, SPICElike model. We show how such properties as minimum and maximum clock frequ ..."
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This paper describes an experimental investigation of the application of dynamical systems theory to the verification of digital VLSI circuits. We analyze the behavior of a ninetransistor toggle element using a simple, SPICElike model. We show how such properties as minimum and maximum clock frequency can be identified from topological features of solutions to the corresponding system of differential equations. This dynamical systems perspective also gives a clear, continuousmodel interpretations of such phenomena as dynamic storage and timing hazards. Keywords: Dynamical systems, hardware verification, hybrid models, real time systems 1 Introduction Most verification of VLSI designs, synchronous and asynchronous, assumes discrete models for signal values and transition times. These discrete models lend themselves well to eventdriven simulation [3], model checking [4], and theorem proving [17]. However, many important circuit phenomena cannot be modeled with discrete time and va...
Flops of crepant resolutions
 Turkish J. Math
"... Let G be a finite subgroup of SL(3, C) acting with an isolated singularity on C 3. A crepant resolution of C 3/G comes together with a set of tautological line bundles associated to each irreducible representation of G. In this note we give a formula for the triple product of the first Chern class o ..."
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of the tautological bundles in terms of both the geometry of the crepant resolution and the representation theory of G. From here we derive the way these triple products change when we perform a flop. 1.
FlipFlop Nets
, 1995
"... The socalled synthesis problem for nets which consists in deciding whether a given automaton is isomorphic to the case graph of a net and then constructing the net has been solved for various type of nets ranging from elementary nets to Petri nets. Though P/T nets admits polynomial time synthesis a ..."
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algorithms, the synthesis problem for elementary nets is known to be NPcomplete. Applying the principle of generalized regions inherited from the P/T nets representation to the boolean setting gives rise to flipflop nets. These nets are a slight generalization of elementary nets and admits a polynomial
Mukai Flop and Ruan Cohomology
, 2003
"... Suppose that two compact manifolds X,X ′ are connected by a sequence of Mukai flops. In this paper, we construct a ring isomorphism between cohomology ring of X and X ′. Using the localization technique, we prove that the quantum corrected products on X,X ′ are the ordinary intersection products. Fu ..."
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Suppose that two compact manifolds X,X ′ are connected by a sequence of Mukai flops. In this paper, we construct a ring isomorphism between cohomology ring of X and X ′. Using the localization technique, we prove that the quantum corrected products on X,X ′ are the ordinary intersection products
Quantum Invariance of Simple Flops
 ICCM 2007 · VOL. II · 1–4
, 2007
"... This note is a supplementary reading for the joint paper [8] with YuanPin Lee and ChinLung Wang, entitled ”Flops, motives and invariance of quantum rings”. In this note, I report our main result by a conceptual description instead of giving logically strict proofs. About the degeneration part whic ..."
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This note is a supplementary reading for the joint paper [8] with YuanPin Lee and ChinLung Wang, entitled ”Flops, motives and invariance of quantum rings”. In this note, I report our main result by a conceptual description instead of giving logically strict proofs. About the degeneration part
FlipFlops, Registers, Counters,
"... In previous chapters we considered combinational circuits where the value of each output depends solely on the values of signals applied to the inputs. There exists another class of logic circuits in which the values of the outputs depend not only on the present values of the inputs but also on the ..."
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In previous chapters we considered combinational circuits where the value of each output depends solely on the values of signals applied to the inputs. There exists another class of logic circuits in which the values of the outputs depend not only on the present values of the inputs but also on the past behavior of the circuit. Such circuits include storage elements that store the values of logic signals. The contents of the storage elements are said to represent the state of the circuit. When the circuit’s inputs change values, the new input values either leave the circuit in the same state or cause it to change into a new state. Over time the circuit changes through a sequence of states as a result of changes in the inputs. Circuits that behave in this way are referred to as sequential circuits. In this chapter we will introduce circuits that can be used as storage elements. But first, we will motivate the need for such circuits by means of a simple example. Suppose that we wish to control an alarm system, as shown in Figure 7.1. The alarm mechanism responds to the control input On/Off. It is turned on when On/Off = 1, and it is off when On/Off = 0. The desired operation is that the alarm turns on when the sensor generates a positive voltage signal, Set, in response to some undesirable event. Once the alarm is triggered, it must remain active even if the sensor output goes back to zero. The alarm is turned off manually
THE RHETORIC OF ―FLIPFLOP ‖ ARGUMENTS
, 2010
"... The undersigned, appointed by the dean of the Graduate School, have examined the ..."
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The undersigned, appointed by the dean of the Graduate School, have examined the
A SelfCorrecting Soft Error Tolerant FlopFlop
 12th NASA Symposium on VLSI Design, Coeur d’Alene
, 2005
"... Abstract—Device technology scaling continues to deliver faster and smaller transistors, contributing to continued improvements in overall microprocessor and computing system performance. However, as transistors shrink, the amount of charge required to change the logic state of a memory also shrinks. ..."
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. This complication spurs new areas of research in fault tolerant circuit and system design. In this work, we present a flipflop capable of detecting and correcting errors caused by high energy particle strikes (so called soft errors). This flipflop, when combined with an error counting framework, may also be used
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