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Efficient Realization of the . . .

by Peter Knabner, Gerhard Summ - MATHEMATICS OF COMPUTATION
"... We consider implementational aspects of the mixed nite element method for a special class of nonlinear problems. We establish the equivalence of the hybridized formulation of the mixed finite element method to a nonconforming finite element method with augmented Crouzeix-Raviart ansatz space. We ..."
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We consider implementational aspects of the mixed nite element method for a special class of nonlinear problems. We establish the equivalence of the hybridized formulation of the mixed finite element method to a nonconforming finite element method with augmented Crouzeix-Raviart ansatz space. We discuss the reduction of unknowns by static condensation and propose Newton's method for the solution of local and global systems. Finally, we show, how such a nonlinear problem arises from the mixed formulation of Darcy-Forchheimer flow in porous media.

EFFICIENT REALIZATION OF PARALLEL HEVC INTRA ENCODING

by Li Song, See Profile, Yanan Zhao, Li Song, Xiangwen Wang, Min Chen, Jia Wang , 2013
"... Efficient realization of parallel HEVC intra encoding ..."
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Efficient realization of parallel HEVC intra encoding

An Efficient Realization of Forward Integer Transform

by Muhammad Nadeem, Stephan Wong, Georgi Kuzmanov - in H.264/AVC Intra-frame Encoder. In International Conference on Embedded Computer Systems (SAMOS , 2010
"... Abstract—The H.264/AVC intra-only frame encoder, for its excellent encoding performance, is well-suited for image/video compression applications such as Digital Still Camera (DSC), Digital Video Camera (DVC), Television Studio Broadcast and Surveillance video. The forward integer transform is an int ..."
Abstract - Cited by 1 (0 self) - Add to MetaCart
is an integral part of the H.264/AVC video encoder. In this paper, for image compression applications running on battery-powered electronic devices (such as DSC), we propose a low-power, area-efficient realization of the forward integer transform. The proposed solution reduces the number of operations by more

Efficient Realization of Coordinate Structures in Combinatory Categorial Grammar

by Michael White , 2004
"... We describe a chart realization algorithm for Combinatory Categorial Grammar (CCG), and show how it can be used to efficiently realize a wide range of coordination phenomena, including argument cluster coordination and gapping. The algorithm incorporates three novel methods for improving the effic ..."
Abstract - Cited by 21 (1 self) - Add to MetaCart
We describe a chart realization algorithm for Combinatory Categorial Grammar (CCG), and show how it can be used to efficiently realize a wide range of coordination phenomena, including argument cluster coordination and gapping. The algorithm incorporates three novel methods for improving

Optimus: Efficient realization of streaming applications on FPGAs

by Manjunat H Kudlur, Scott Mahlke, David Bacon, Rodric Rabbah - In Proc. of the 2008 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems , 2008
"... In this paper, we introduce Optimus: an optimizing synthesis com-piler for streaming applications. Optimus compiles programs writ-ten in a high level streaming language to either software or hard-ware implementations. The compiler uses a hierarchical compila-tion strategy that separates concerns bet ..."
Abstract - Cited by 18 (3 self) - Add to MetaCart
In this paper, we introduce Optimus: an optimizing synthesis com-piler for streaming applications. Optimus compiles programs writ-ten in a high level streaming language to either software or hard-ware implementations. The compiler uses a hierarchical compila-tion strategy that separates concerns between macro- and micro-functional requirements. Macro-functional concerns address how components (modules) are assembled to implement larger more complex applications. Micro-functional issues deal with synthesis issues of the module internals. Optimus thus allows software de-velopers who lack deep hardware design expertise to transparently leverage the advantages of hardware customization without cross-ing the semantic gap between high level languages and hardware description languages. Optimus generates streaming hardware that achieves on average 40x speedup over our baseline embedded pro-cessor for a fraction of the energy. Additionally, our results show that streaming-specific optimizations can further improve perfor-mance by 255 % and reduce the area requirements by 16 % in av-erage. These designs are competitive with Handel-C implementa-tions for some of the same benchmarks.

Space-bandwidth efficient realizations of linear systems

by M. Alper Kutay, M. Fatih Erden, Haldun M. Ozaktas, Orhan Arıkan, Özgür Güleryüz - Opt. Lett , 1998
"... One can obtain either exact realizations or useful approximations of linear systems or matrix–vector products that arise in many different applications by implementing them in the form of multistage or multichannel fractional Fourier-domain filters, resulting in space–bandwidth-efficient systems wit ..."
Abstract - Cited by 7 (6 self) - Add to MetaCart
One can obtain either exact realizations or useful approximations of linear systems or matrix–vector products that arise in many different applications by implementing them in the form of multistage or multichannel fractional Fourier-domain filters, resulting in space–bandwidth-efficient systems

Efficient Realization of Strongly Indicating Function Blocks

by P. Balasubramanian, D. A. Edwards
"... This paper presents a technique for efficient gate-level realization of strongly indicating function blocks. For the function block implementing the desired logic, the input state space explodes as it expands exponentially for even a gradual increase in the number of inputs. In this context, a novel ..."
Abstract - Cited by 1 (1 self) - Add to MetaCart
This paper presents a technique for efficient gate-level realization of strongly indicating function blocks. For the function block implementing the desired logic, the input state space explodes as it expands exponentially for even a gradual increase in the number of inputs. In this context, a

Computationally Efficient Realization Of Mdft Filter Banks

by T. Karp, N. J. Fliege
"... A realization of the Modified DFT (MDFT) filter bank introduced in [1, 2, 3] was proposed in [4]. The analysis and synthesis filter bank consist each of two DFT polyphase filter banks, one without delay and one delayed by M=2 samples where M represents the number of channels of the MDFT filter bank. ..."
Abstract - Cited by 2 (0 self) - Add to MetaCart
A realization of the Modified DFT (MDFT) filter bank introduced in [1, 2, 3] was proposed in [4]. The analysis and synthesis filter bank consist each of two DFT polyphase filter banks, one without delay and one delayed by M=2 samples where M represents the number of channels of the MDFT filter bank

Efficient Realization of Mass-Spring Systems on Graphics Hardware

by Florian Echtler , 2004
"... Physics-based simulation of deformable objects is a valuable tool for creating realistic and plausible computer graphics. However, even the calculations involved for simple abstractions like mass-spring models are highly demanding, especially when real-time simulation is desired. This diploma thes ..."
Abstract - Cited by 1 (0 self) - Add to MetaCart
Physics-based simulation of deformable objects is a valuable tool for creating realistic and plausible computer graphics. However, even the calculations involved for simple abstractions like mass-spring models are highly demanding, especially when real-time simulation is desired. This diploma thesis explores the possibility to use the powerful vector computation engine present in modern 3D graphics hardware for these calculations and shows a significant performance gain over CPU-based solutions, which in turn allows the use of larger and more detailed models.

An Efficient Realization of an OCR System Using HDL

by Azam Beg
"... Abstract- This paper presents a Verilog model of an artificial neural network for Arabic character recognition. A neural network by nature is a non-linear system that presents some unusual challenges when realized in digital domain. A main feature of our proposed model is that it does not require ha ..."
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Abstract- This paper presents a Verilog model of an artificial neural network for Arabic character recognition. A neural network by nature is a non-linear system that presents some unusual challenges when realized in digital domain. A main feature of our proposed model is that it does not require
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