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Table 5. Error detection mechanisms

in Experimental Assessment of COTS DBMS Robustness under Transient Faults
by Diamantino Costa
"... In PAGE 7: ...atchdog, in turn, detected 30.0% of the errors. The TPC- HA consistency tests did not detected a single corruption in user data, which is definitely a good mark on the robustness of the target system. Table5 summarizes the detection figures. It should be stressed that the detection vales are counted independently of the detection of other mechanisms.... ..."

Table 1. Error Detection Mechanisms in Chameleon ARMORs

in Fault injection based assessment of fail-silence provided by process duplication versus internal error detection
by David T. Stott, Neil A. Speirs, Jun Xu, Saurabh Bagchi, Keith Whisnant, Zbigniew Kalbarczyk, Ravishankar K. Iyer 2000
"... In PAGE 7: ... Levels 3 and 4 involve distributed detection protocols among replicas or pseudo-replicas of ARMORs, possibly executing on different nodes; these levels are not considered for this paper. Table1 lists the available techniques. It should be noted that the ARMOR architecture is designed to support both control flow and data signatures.... ..."
Cited by 1

Table 1. Error Detection Mechanisms in Chameleon ARMORs

in Fault Injection Based Assessment of Fail-Silence Provided by Process Duplication versus Internal Error Detection
by David T. Stott, Neil A. Speirs, Jun Xu, Saurabh Bagchi, Keith Whisnant, Zbigniew Kalbarczyk, Ravishankar K. Iyer
"... In PAGE 7: ... Levels 3 and 4 involve distributed detection protocols among replicas or pseudo-replicas of ARMORs, possibly executing on different nodes; these levels are not considered for this paper. Table1 lists the available techniques. It should be noted that the ARMOR architecture is designed to support both control flow and data signatures.... ..."

Table 1. Error detection mechanisms of Thor. Error Detection

in Reducing critical failures for control algorithms using executable assertions and best effort recovery
by Jonny Vinter, Joakim Aidemark, Peter Folkesson, Johan Karlsson 2001
"... In PAGE 4: ... Thor is a 32-bit CPU with a four-stage pipeline and a 128 byte data cache located within the pipeline. Several error detection mechanisms, see Table1 , and support for Ada tasking are included in the processor. Thor also features advanced scan-chain logic that allows read access to more than 3000 of the almost 4500 internal state elements of the CPU and write access to more than 2700 internal state elements.... In PAGE 6: ....1.1. Effective errors. Effective errors are errors which were either detected by the error detection mechanisms of the Thor processor (see Table1 ) or errors causing undetected wrong results (value failures) to be produced by the PI controller: Detected errors: Errors detected by the error detection mechanisms in Thor. These errors are further classified into errors detected by each of the various mechanisms or other errors.... ..."
Cited by 5

Table 1. Error Detections in Chameleon Detection Mechanism Description

in Comparing Fail-Silence Provided by Process Duplication versus Internal Error Detection for DHCP Server
by David T. Stott, Neil A. Speirs, Zbigniew Kalbarczyk, Saurabh Bagchi, Jun Xu, Ravishankar K. Iyer 2001
"... In PAGE 3: ...niques. Table1 lists the error detection techniques used in this study. Table 1.... ..."
Cited by 2

Table 1. Error Detections in Chameleon Detection Mechanism Description

in Comparing Fail-Silence Provided by Process Duplication versus Internal Error
by Detection For Dhcp, David T. Stott, Neila. Speirs Ý, Zbigniew Kalbarczyk, Saurabh Bagchi, Jun Xu, Ravishankar K. Iyer 2001
"... In PAGE 3: ...niques. Table1 lists the error detection techniques used in this study. Table 1.... ..."
Cited by 2

Table 1. Error Detections in Chameleon Detection Mechanism Description

in Comparing Fail-Silence Provided by Process Duplication versus Internal Error
by Detection For Dhcp, David T. Stott, Neil A. Speirs, Zbigniew Kalbarczyk, Saurabh Bagchi, Jun Xu, Ravishankar K. Iyer
"... In PAGE 3: ...niques. Table1 lists the error detection techniques used in this study. Table 1.... ..."

Table 2 summarizes the configuration options related to the automatic main detection mechanism.

in JADE Administrator’s GUIDE JADE ADMINISTRATOR’S GUIDE USAGE RESTRICTED ACCORDING TO LICENSE AGREEMENT.
by Fabio Bellifemine, Giovanni Caire, Formerly Cselt
"... In PAGE 15: ... Table2 . Automatic Main Detection mechanism options 2.... ..."

Table 2: Bandwidth requirements for the passive detection mechanisms, in bytes/instruction.

in Fingerprinting: Bounding Soft-Error Detection Latency and Bandwidth
by Jared C. Smolens, Brian T. Gold, Jangwoo Kim, Babak Falsafi, James C. Hoe, Andreas G. Nowatzyk 2004
"... In PAGE 8: ... This approach to detection requires no extra pin bandwidth over that already required to run applications, since it passively monitors tra c going to memory or the rest of the system. In Table2 , we report the average bandwidth generated by the three application classes (calculated as the sum of ad- dress and data tra c required to complete the memory re- quests). The passive nature of this approach makes it an attractive option for detecting errors in redundant proces- sors across physical chips.... ..."
Cited by 26

Table 2: Bandwidth requirements for the passive detection mechanisms, in bytes/instruction.

in Fingerprinting: Bounding soft-error detection latency and bandwidth
by Jared C. Smolens, Brian T. Gold, Jangwoo Kim, Babak Falsafi, James C. Hoe, Andreas G. Nowatzyk 2004
"... In PAGE 8: ... This approach to detection requires no extra pin bandwidth over that already required to run applications, since it passively monitors tra c going to memory or the rest of the system. In Table2 , we report the average bandwidth generated by the three application classes (calculated as the sum of ad- dress and data tra c required to complete the memory re- quests). The passive nature of this approach makes it an attractive option for detecting errors in redundant proces- sors across physical chips.... ..."
Cited by 26
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