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Cycle packing
"... In the 1960s, Erdős and Gallai conjectured that the edge set of every graph on n vertices can be partitioned into O(n) cycles and edges. They observed that one can easily get an O(n log n) upper bound by repeatedly removing the edges of the longest cycle. We make the first progress on this problem, ..."
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In the 1960s, Erdős and Gallai conjectured that the edge set of every graph on n vertices can be partitioned into O(n) cycles and edges. They observed that one can easily get an O(n log n) upper bound by repeatedly removing the edges of the longest cycle. We make the first progress on this problem
Approximation Algorithms and Hardness Results for Cycle Packing Problems
"... The cycle packing number νe(G) of a graph G is the maximum number of pairwise edgedisjoint cycles in G. Computing νe(G) is an NPhard problem. We present approximation algorithms for computing νe(G) in both undirected and directed graphs. In the undirected case we analyze ..."
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Cited by 9 (1 self)
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The cycle packing number νe(G) of a graph G is the maximum number of pairwise edgedisjoint cycles in G. Computing νe(G) is an NPhard problem. We present approximation algorithms for computing νe(G) in both undirected and directed graphs. In the undirected case we analyze
Matchings, Hamilton cycles and cycle packings in uniform hypergraphs
"... It is well known that every bipartite graph with vertex classes of size n whose minimum degree is at least n/2 contains a perfect matching. We prove an analogue of this result for uniform hypergraphs. We also provide an analogue of Dirac’s theorem on Hamilton cycles for 3uniform hypergraphs: We say ..."
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It is well known that every bipartite graph with vertex classes of size n whose minimum degree is at least n/2 contains a perfect matching. We prove an analogue of this result for uniform hypergraphs. We also provide an analogue of Dirac’s theorem on Hamilton cycles for 3uniform hypergraphs: We
EXTREMAL PROBLEMS ON CYCLES, PACKING, AND DECOMPOSITION OF GRAPHS
, 2011
"... ... we study extremal problems concerning cycles and paths in graphs, graph packing, and graph decomposition. We use “graph” in the general sense, allowing loops and multiedges. The Chvátal–Erdős Theorem states that every graph whose connectivity is at least its independence number has a spanning c ..."
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... we study extremal problems concerning cycles and paths in graphs, graph packing, and graph decomposition. We use “graph” in the general sense, allowing loops and multiedges. The Chvátal–Erdős Theorem states that every graph whose connectivity is at least its independence number has a spanning
Maximal Cyclic 4Cycle Packings and Minimal Cyclic 4Cycle Coverings of the Complete Graph
"... Abstract. In this paper, we define an automorphism of a graph packing and of a graph covering. We consider automorphisms which consist of a single cycle (called cyclic) and give necessary and sufficient conditions for maximal cyclic 4cycle packings and minimal cyclic 4cycle coverings of the comple ..."
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Abstract. In this paper, we define an automorphism of a graph packing and of a graph covering. We consider automorphisms which consist of a single cycle (called cyclic) and give necessary and sufficient conditions for maximal cyclic 4cycle packings and minimal cyclic 4cycle coverings
An Efficient Algorithm for Finding Maximum Cycle Packings in Reducible Flow Graphs
"... Rights The original publication is available at www.springerlink.com ..."
Packing Cycles in Undirected Graphs
"... Given an undirected graph G with n nodes and m edges, we address the problem of finding a largest collection of edgedisjoint cycles in G. The problem, dubbed Cycle Packing, is very closely related to a few genome rearrangement problems in computational biology. In this paper, we study the complex ..."
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Cited by 13 (0 self)
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Given an undirected graph G with n nodes and m edges, we address the problem of finding a largest collection of edgedisjoint cycles in G. The problem, dubbed Cycle Packing, is very closely related to a few genome rearrangement problems in computational biology. In this paper, we study
Approximability of packing disjoint cycles
 IN: PROCEEDINGS OF 18TH INTERNATIONAL SYMPOSIUM ON ALGORITHMS AND COMPUTATION
, 2007
"... Given a graph G, the edgedisjoint cycle packing problem is to nd the largest set of cycles of which no two share an edge. For undirected graphs, the best known approximation algorithm has ratio O( p log n) where n = jV (G)j and is due to Krivelevich et al [14, 15]. In fact, they proved the same upp ..."
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Cited by 6 (0 self)
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Given a graph G, the edgedisjoint cycle packing problem is to nd the largest set of cycles of which no two share an edge. For undirected graphs, the best known approximation algorithm has ratio O( p log n) where n = jV (G)j and is due to Krivelevich et al [14, 15]. In fact, they proved the same
FlowMap: An Optimal Technology Mapping Algorithm for Delay Optimization in LookupTable Based FPGA Designs
 IEEE TRANS. CAD
, 1994
"... The field programmable gatearray (FPGA) has become an important technology in VLSI ASIC designs. In the past a few years, a number of heuristic algorithms have been proposed for technology mapping in lookuptable (LUT) based FPGA designs, but none of them guarantees optimal solutions for general Bo ..."
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Cited by 317 (41 self)
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The field programmable gatearray (FPGA) has become an important technology in VLSI ASIC designs. In the past a few years, a number of heuristic algorithms have been proposed for technology mapping in lookuptable (LUT) based FPGA designs, but none of them guarantees optimal solutions for general Boolean networks and little is known about how far their solutions are away from the optimal ones. This paper presents a theoretical breakthrough which shows that the LUTbased FPGA technology mapping problem for depth minimization can be solved optimally in polynomial time. A key step in our algorithm is to compute a minimum height Kfeasible cut in a network, which is solved optimally in polynomial time based on network flow computation. Our algorithm also effectively minimizes the number of LUTs by maximizing the volume of each cut and by several postprocessing operations. Based on these results, we have implemented an LUTbased FPGA mapping package called FlowMap. We have tested FlowMap on a large set of benchmark examples and compared it with other LUTbased FPGA mapping algorithms for delay optimization, including Chortled, MISpgadelay, and DAGMap. FlowMap reduces the LUT network depth by up to 7% and reduces the number of LUTs by up to 50% compared to the three previous methods.
Results 1  10
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