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programmable architecture of Configurable Logic Blocks

by unknown authors , 2008
"... The Spartan-IIE family of FPGAs have a regular, flexible, ..."
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The Spartan-IIE family of FPGAs have a regular, flexible,

A QCA implementation of a configurable logic block for an FPGA

by Timothy Lantz, Eric Peskin, Timothy Lantz, Eric Peskin - in Proc. ReConFig 2006, San Luis Potosi , 2006
"... A QCA implementation of a configurable logic block for an FPGA ..."
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A QCA implementation of a configurable logic block for an FPGA

Built-In Self-Test of Configurable Logic Blocks in

by Virtex- Fpgas, Bradley F. Dutton, Charles E. Stroud
"... Abstract — A Built-In Self-Test (BIST) approach is presented for the configurable logic blocks (CLBs) in Xilinx Virtex-5 Field Programmable Gate Arrays (FPGAs). A total of 17 configurations were developed to completely test the full functionality of the CLBs, including distributed RAM modes of opera ..."
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Abstract — A Built-In Self-Test (BIST) approach is presented for the configurable logic blocks (CLBs) in Xilinx Virtex-5 Field Programmable Gate Arrays (FPGAs). A total of 17 configurations were developed to completely test the full functionality of the CLBs, including distributed RAM modes

Configurable Logic Block (CLB) using Asynchronous Static

by Indira P. Dugganapally, Waleed K. Al-assadi, Tejaswini Tammina, Scott Smith
"... Abstract-This paper proposes the design of a FPGA ..."
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Abstract-This paper proposes the design of a FPGA

Low-Power Configurable Logic Block (CLB) Design for FPGAs

by Bhavya Daya
"... Logic Blocks (CLB), with a routing architecture that connects these blocks together (Figure 1). An island-style FPGA structure is investigated and the CLB is explored in order to reduce its power consumption. Approximately 16 percent of the FPGA power is consumed by the CLBs alone. As technology nod ..."
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Logic Blocks (CLB), with a routing architecture that connects these blocks together (Figure 1). An island-style FPGA structure is investigated and the CLB is explored in order to reduce its power consumption. Approximately 16 percent of the FPGA power is consumed by the CLBs alone. As technology

In-System Testing of Configurable Logic Blocks in Xilinx 7-Series FPGAs

by Harmish Rajeshkumar Modi, Carl B. Dietrich, Michael S. Hsiao, Harmish Rajeshkumar Modi , 2015
"... FPGA fault recovery techniques, such as bitstream scrubbing, are only limited to detecting and correcting soft errors that corrupt the configuration memory. Scrubbing and related techniques cannot detect permanent faults within the FPGA fabric, such as short circuits and open circuits in FPGA transi ..."
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transistors that arise from electromigration effects. Several Built-In Self-Test (BIST) techniques have been proposed in the past to detect and isolate such faults. These techniques suffer from routing congestion problems in modern FPGAs that have a large number of logic blocks. This thesis presents

The synchronous dataflow programming language LUSTRE

by N. Halbwachs, P. Caspi, P. Raymond, D. Pilaud - Proceedings of the IEEE , 1991
"... This paper describes the language Lustre, which is a dataflow synchronous language, designed for programming reactive systems --- such as automatic control and monitoring systems --- as well as for describing hardware. The dataflow aspect of Lustre makes it very close to usual description tools in t ..."
Abstract - Cited by 646 (50 self) - Add to MetaCart
in these domains (block-diagrams, networks of operators, dynamical samples-systems, etc: : : ), and its synchronous interpretation makes it well suited for handling time in programs. Moreover, this synchronous interpretation allows it to be compiled into an efficient sequential program. Finally, the Lustre

Concurrent Constraint Programming

by Vijay A. Saraswat, Martin Rinard , 1993
"... This paper presents a new and very rich class of (con-current) programming languages, based on the notion of comput.ing with parhal information, and the con-commitant notions of consistency and entailment. ’ In this framework, computation emerges from the inter-action of concurrently executing agent ..."
Abstract - Cited by 502 (16 self) - Add to MetaCart
be pos-sible. To reflect this view of computation, [Sar89] develops the cc family of languages. We present here one mem-ber of the family, CC(.L,+) (pronounced “cc with Ask and Choose”) which provides the basic operations of blocking Ask and atomic Tell and an algebra of be-haviors closed under prefixing

Recognition-by-components: A theory of human image understanding

by Irving Biederman - Psychological Review , 1987
"... The perceptual recognition of objects is conceptualized to be a process in which the image of the input is segmented at regions of deep concavity into an arrangement of simple geometric components, such as blocks, cylinders, wedges, and cones. The fundamental assumption of the proposed theory, recog ..."
Abstract - Cited by 1272 (23 self) - Add to MetaCart
The perceptual recognition of objects is conceptualized to be a process in which the image of the input is segmented at regions of deep concavity into an arrangement of simple geometric components, such as blocks, cylinders, wedges, and cones. The fundamental assumption of the proposed theory

The process group approach to reliable distributed computing

by Kenneth P. Birman - Communications of the ACM , 1993
"... The difficulty of developing reliable distributed softwme is an impediment to applying distributed computing technology in many settings. Expeti _ with the Isis system suggests that a structured approach based on virtually synchronous _ groups yields systems that are substantially easier to develop, ..."
Abstract - Cited by 572 (19 self) - Add to MetaCart
configuration changes occur. The resulting building blocks are, therefore, unsuitable for facilitating the construction of systems where reliability is impo/tant. This paper reviews six years of research on Isis, a syg_,,m that provides tools _ support the construction of reliable distributed software
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