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Scheduling for reduced CPU energy

by Mark Weiser, Brent Welch, Alan Demers, Scott Shenker - USENIX SYMP. OPERATING , 1994
"... The energy usage of computer systems is becoming more important, especially for battery operated systems. Displays, disks, and cpus, in that order, use the most energy. Reducing the energy used by displays and disks has been studied elsewhere; this paper considers a new method for reducing the energ ..."
Abstract - Cited by 563 (2 self) - Add to MetaCart
the energy used by the cpu. We introduce a new metric for cpu energy performance, millions-of-instructions-per-joule (MIPJ). We examine a class of methods to reduce MIPJ that are characterized by dynamic control of system clock speed by the operating system scheduler. Reducing clock speed alone does

Virtual clock: A new traffic control algorithm for packet switching networks

by Lixia Zhang - In Proc. ACM SIGCOMM , 1990
"... A challenging research issue in high speed networking is how to control the transmission rate of statistical data P OWS. This paper describes a new algorithm, Virtual-Clock, for data trafic control in high-speed networks. VirtualClock maintains the statistical multiplexing flexibility of packet swit ..."
Abstract - Cited by 617 (4 self) - Add to MetaCart
A challenging research issue in high speed networking is how to control the transmission rate of statistical data P OWS. This paper describes a new algorithm, Virtual-Clock, for data trafic control in high-speed networks. VirtualClock maintains the statistical multiplexing flexibility of packet

Differential modulation of clock speed by the administration of intermittent versus continuous cocaine

by Matthew S. Matell, George R. King, Warren H. Meck - Behavioral Neuroscience , 2004
"... The roles that psychostimulant sensitization and tolerance play in temporal perception in the seconds-to-minutes range were assessed in rats. Cocaine (20 mg/kg/day) was administered for 2 weeks either intermittently via daily injections (induces sensitization) or continuously via an osmotic minipump ..."
Abstract - Cited by 10 (3 self) - Add to MetaCart
minipump (induces tolerance). Interval timing was evaluated throughout administration and withdrawal. Injections of cocaine caused immediate, proportional, leftward shifts in peak times, indicating an increase in the speed of an internal clock. These shifts grew progressively larger with repeated

Time is money: The effect of clock speed on seller’s revenue in Dutch auctions

by Exp Econ, Elena Katok, Anthony M. Kwasnica , 2006
"... Abstract We study the role of timing in auctions under the premise that time is a valuable resource. When one object is for sale, Dutch and first-price sealed bid auctions are strategically equivalent in standard models, and therefore, they should yield the same revenue for the auctioneer. We study ..."
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Dutch and first-price sealed bid auctions in the laboratory, with a specific emphasis on the speed of the clock in the Dutch auction. At fast clock speeds, revenue in the Dutch auction is significantly lower than it is in the sealed bid auction. When the clock is sufficiently slow, however, revenue

Complexity-effective superscalar processors

by Subbarao Palacharla, J. E. Smith, et al. - IN PROCEEDINGS OF THE 24TH ANNUAL INTERNATIONAL SYMPOSIUM ON COMPUTER ARCHITECTURE , 1997
"... The performance tradeoff between hardware complexity and clock speed is studied. First, a generic superscalar pipeline is defined. Then the specific areas of register renaming, instruction window wakeup and selection logic, and operand bypassing are ana-lyzed. Each is modeled and Spice simulated for ..."
Abstract - Cited by 467 (5 self) - Add to MetaCart
The performance tradeoff between hardware complexity and clock speed is studied. First, a generic superscalar pipeline is defined. Then the specific areas of register renaming, instruction window wakeup and selection logic, and operand bypassing are ana-lyzed. Each is modeled and Spice simulated

Internet time synchronization: The network time protocol

by D. L. Mills , 1989
"... This memo describes the Network Time Protocol (NTP) designed to distribute time information in a large, diverse internet system operating at speeds from mundane to lightwave. It uses a returnabletime architecture in which a distributed subnet of time servers operating in a self-organizing, hierarchi ..."
Abstract - Cited by 628 (15 self) - Add to MetaCart
This memo describes the Network Time Protocol (NTP) designed to distribute time information in a large, diverse internet system operating at speeds from mundane to lightwave. It uses a returnabletime architecture in which a distributed subnet of time servers operating in a self

Consensus in the presence of partial synchrony

by Cynthia Dwork, Nancy Lynch, Larry Stockmeyer - JOURNAL OF THE ACM , 1988
"... The concept of partial synchrony in a distributed system is introduced. Partial synchrony lies between the cases of a synchronous system and an asynchronous system. In a synchronous system, there is a known fixed upper bound A on the time required for a message to be sent from one processor to ano ..."
Abstract - Cited by 513 (18 self) - Add to MetaCart
to another and a known fixed upper bound (I, on the relative speeds of different processors. In an asynchronous system no fixed upper bounds A and (I, exist. In one version of partial synchrony, fixed bounds A and (I, exist, but they are not known a priori. The problem is to design protocols that work

Memory performance at reduced cpu clock speeds: an analysis of current x86 64 processors

by Robert Schöne , Daniel Hackenberg , Daniel Molka - In Proceedings of the 2012 USENIX conference on Power-Aware Computing and Systems, HotPower’12 , 2012
"... Abstract-Reducing CPU frequency and voltage is a well-known approach to reduce the energy consumption of memory-bound applications. This is based on the conception that main memory performance sees little or no degradation at reduced processor clock speeds, while power consumption decreases signifi ..."
Abstract - Cited by 7 (1 self) - Add to MetaCart
Abstract-Reducing CPU frequency and voltage is a well-known approach to reduce the energy consumption of memory-bound applications. This is based on the conception that main memory performance sees little or no degradation at reduced processor clock speeds, while power consumption decreases

Time is Money: The effect of clock speed on seller's revenue in Dutch auctions

by Elena Katok, Anthony M. Kwasnica , 2002
"... Introduction and related literature The role of timing in markets has been receiving an increasing amount of attention in the economics literature. Roth and Xing (1994) start their paper by pointing out that "The timing of transactions is a little-studied feature of markets, but one which pla ..."
Abstract - Cited by 18 (2 self) - Add to MetaCart
Introduction and related literature The role of timing in markets has been receiving an increasing amount of attention in the economics literature. Roth and Xing (1994) start their paper by pointing out that "The timing of transactions is a little-studied feature of markets, but one which pla ys a large role in their ability to function." The popularity of Internet auctions, such as eBay, has made timing issues in auctions particularly salient. Traditional auction houses, such as Christie's, require bidders or their representatives to assemble at a specific place and time, and therefore auctions must be conducted fairly quickly (often lasting less than an hour). In contrast, Internet auctions allow geographically dispersed bidders to participate, making it possible to conduct auctions that last many days. One disadvantage of long Internet auctions is that they may impose high monitoring costs on the bidders, affecting the strategy of the bidders and the revenues of the auctioneer.

MICROPROCESSOR THE ALPHA 21264 OWES ITS HIGH PERFORMANCE TO HIGH CLOCK SPEED, MANY FORMS OF OUT-OF-ORDER AND SPECULATIVE EXECUTION, AND A HIGH-

by R. E. Kessler, Bandwidth Memory System
"... Alpha microprocessors have been performance leaders since their introduction in 1992. The first generation 21064 and the later 21164 1,2 raised expectations for the newest generation—performance leadership was again a goal of the 21264 design team. Benchmark scores of 30+ SPECint95 and 58+ SPECfp95 ..."
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offer convincing evidence thus far that the 21264 achieves this goal and will continue to set a high performance standard. A unique combination of high clock speeds and advanced microarchitectural techniques, including many forms of out-of-order and speculative execution, provide exceptional core
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