### Table 2. Average density results for the ISCAS-85 benchmark circuits. Time is in cpu seconds. Circuit Avg. Density Avg. Density (time) %Error

1993

Cited by 126

### Table 3.7: Hierarchical Diagnosis Results for Multiple Stuck-at Errors, Start Radius 8, End Radius 2, Overlap Radius 0 (No Overlap). Circuit Time Error Rank Candidate List

### Table 3.8: Hierarchical Diagnosis Results for Multiple Stuck-at Errors, Hier 2. Start radius 8, End radius 2, Overlap radius 2 Circuit Time Error Rank Candidate List

### Table 3.9: Hierarchical Diagnosis Results for Multiple Stuck-at Errors, Hier 4. Start radius 8, End radius 2, Overlap radius 2 Circuit Time Error Rank Candidate List

### Table 4: Diagnosis of Sequential circuits with Single Stuck-at Errors using Regions of Radius 0 Circuit No. of No. of Error Error Jump Time Cand E R

2001

"... In PAGE 5: ...2 Diagnosis of sequential circuits We have applied this diagnosis algorithm for sequential circuits for both single and multiple stuck faults using re- gions of radius 0, 1 and 2. Table4 shows the results for diagnosis of sequential circuits with single stuck-at errors injected at random using regions of radius 0. The columns in the table represent for each of the circuit, average over 10 runs, the number of vectors in the given test set, the number of regions of radius 0 which is equal to the num- ber of gates in the circuit, the vector at which the circuit failed, the time frame which was used for diagnosis, the JUMPNUM as explained earlier, the time taken in sec- onds, the number of candidate regions returned, number of regions fully containing the error and the best rank of the region containing the error.... ..."

Cited by 3

### Table 4: Diagnosis of Sequential circuits with Single Stuck-at Errors using Regions of Radius 0 Circuit No. of No. of Error Error Jump Time Cand E R

2001

"... In PAGE 5: ...2 Diagnosis of sequential circuits We have applied this diagnosis algorithm for sequential circuits for both single and multiple stuck faults using re- gions of radius 0, 1 and 2. Table4 shows the results for diagnosis of sequential circuits with single stuck-at errors injected at random using regions of radius 0. The columns in the table represent for each of the circuit, average over 10 runs, the number of vectors in the given test set, the number of regions of radius 0 which is equal to the num- ber of gates in the circuit, the vector at which the circuit failed, the time frame which was used for diagnosis, the JUMPNUM as explained earlier, the time taken in sec- onds, the number of candidate regions returned, number of regions fully containing the error and the best rank of the region containing the error.... ..."

Cited by 3

### Table 1. Comparison of Simulation results for some basic static CMOS digital circuits CMOS Estimated power ( ) computation time (sec) # of states error

1996

Cited by 1

### Table 2: Comparison of PowerDrive with previous approaches. Circuit Mean Error (scaled by 10 3 ) Bdd size Time (seconds)

"... In PAGE 5: ... We computed the probabilities of all the primary outputs of 50 MCNC bench- marks using PowerDrive (PowDr), Feather (Feath) [2] and Cam (Cam) [7]. Table2 tabulates the mean error (scaled by 10 3 ), the bdd size to compute it and the runtime of each of the above al- gorithms for 15 of the circuits. The complete table is excluded due to shortage of space and is reported in [10].... ..."

### Table 2: 10% of the gates included in five Black Boxes circuit in out #nodes detected errors #nodes implementation peak during check run time

2001

"... In PAGE 5: ... In a second experiment we varied the generation of partial imple- mentations of our first experiment to obtain 5 different Black Boxes instead of one. Results are given in Table2 . Memory consumption and run times are about in the same range compared to the first ex- periment with the exception of circuit C880 where time and mem- ory consumption for output and input exact checks increase (about 2Since in the case of one Black Box the input exact check is exact, an average of 91% detected errors means, that for the remaining 9% of the cases our circuit modification described above did not really insert an error into the partial implementation, i.... ..."

Cited by 17

### Table 2: 10% of the gates included in five Black Boxes circuit in out #nodes detected errors #nodes implementation peak during check run time

"... In PAGE 5: ... In a second experiment we varied the generation of partial imple- mentations of our first experiment to obtain 5 different Black Boxes instead of one. Results are given in Table2 . Memory consumption and run times are about in the same range compared to the first ex- periment with the exception of circuit C880 where time and mem- 2Since in the case of one Black Box the input exact check is exact, an average of 91% detected errors means, that for the remaining 9% of the cases our circuit modification described above did not really insert an error into the partial implementation, i.... ..."