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(Guest Editors) Fast Ray Sorting and Breadth-First Packet Traversal for GPU Ray Tracing

by Kirill Garanzha, Charles Loop
"... We present a novel approach to ray tracing execution on commodity graphics hardware using CUDA. We decompose a standard ray tracing algorithm into several data-parallel stages that are mapped efficiently to the massively parallel architecture of modern GPUs. These stages include: ray sorting into co ..."
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into coherent packets, creation of frustums for packets, breadth-first frustum traversal through a bounding volume hierarchy for the scene, and localized ray-primitive intersections. We utilize the well known parallel primitives scan and segmented scan in order to process irregular data structures, to remove

The BSD Packet Filter: A New Architecture for User-level Packet Capture

by Steven Mccanne, Van Jacobson , 1992
"... Many versions of Unix provide facilities for user-level packet capture, making possible the use of general purpose workstations for network monitoring. Because network monitors run as user-level processes, packets must be copied across the kernel/user-space protection boundary. This copying can be m ..."
Abstract - Cited by 566 (2 self) - Add to MetaCart
Many versions of Unix provide facilities for user-level packet capture, making possible the use of general purpose workstations for network monitoring. Because network monitors run as user-level processes, packets must be copied across the kernel/user-space protection boundary. This copying can

Route Packets, Not Wires: On-Chip Interconnection Networks

by William J. Dally, Brian Towles , 2001
"... Using on-chip interconnection networks in place of ad-hoc global wiring structures the top level wires on a chip and facilitates modular design. With this approach, system modules (processors, memories, peripherals, etc...) communicate by sending packets to one another over the network. The structur ..."
Abstract - Cited by 864 (10 self) - Add to MetaCart
Using on-chip interconnection networks in place of ad-hoc global wiring structures the top level wires on a chip and facilitates modular design. With this approach, system modules (processors, memories, peripherals, etc...) communicate by sending packets to one another over the network

Supporting Real-Time Applications in an Integrated Services Packet Network: Architecture and Mechanism

by David D. Clark, Scott Shenker, Lixia Zhang , 1992
"... This paper considers the support of real-time applications in an ..."
Abstract - Cited by 575 (25 self) - Add to MetaCart
This paper considers the support of real-time applications in an

Parallel Breadth-First Search LTL Model-Checking

by Jiri Barnat , Lubos Brim, Jakub Chaloupka - IN 18TH IEEE INTERNATIONAL CONFERENCE ON AUTOMATED SOFTWARE ENGINEERING (ASE’03 , 2003
"... We propose a practical parallel on-the-fly algorithm for enumerative LTL model-checking. The algorithm is designed for a cluster of workstations communicating via MPI. The detection of cycles (faulty runs) effectively employs the so called back-level edges. In particular, a parallel level-synchroniz ..."
Abstract - Cited by 31 (7 self) - Add to MetaCart
-synchronized breadth-first search of the graph is performed to discover back-level edges. For each level the back-level edges are checked in parallel by a nested depthfirst search to confirm or refute the presence of a cycle. Several optimizations of the basic algorithm are presented and advantages and drawbacks

Explicit Allocation of Best-Effort Packet Delivery Service

by David D. Clark, et al. , 1998
"... This paper presents the “allocated-capacity” framework for providing different levels of best-effort service in times of network congestion. The “allocatedcapacity” framework—extensions to the Internet protocols and algorithms—can allocate bandwidth to different users in a controlled and predictable ..."
Abstract - Cited by 467 (2 self) - Add to MetaCart
This paper presents the “allocated-capacity” framework for providing different levels of best-effort service in times of network congestion. The “allocatedcapacity” framework—extensions to the Internet protocols and algorithms—can allocate bandwidth to different users in a controlled and predictable way during network congestion. The framework supports two complementary ways of controlling the bandwidth allocation: sender-based and receiver-based. In today’s heterogeneous and commercial Internet the framework can serve as a basis for charging for usage and for more efficiently utilizing the network resources. We focus on algorithms for essential components of the framework: a differential dropping algorithm for network routers and a tagging algorithm for profile meters at the edge of the network for bulk-data transfers. We present simulation results to illustrate the effectiveness of the combined algorithms in controlling transmission control protocol (TCP) traffic to achieve certain targeted sending rates.

Practical network support for IP traceback

by Stefan Savage, David Wetherall, Anna Karlin, Tom Anderson , 2000
"... This paper describes a technique for tracing anonymous packet flooding attacks in the Internet back towards their source. This work is motivated by the increased frequency and sophistication of denial-of-service attacks and by the difficulty in tracing packets with incorrect, or “spoofed”, source ad ..."
Abstract - Cited by 666 (14 self) - Add to MetaCart
addresses. In this paper we describe a general purpose traceback mechanism based on probabilistic packet marking in the network. Our approach allows a victim to identify the network path(s) traversed by attack traffic without requiring interactive operational support from Internet Service Providers (ISPs

Parallel Breadth-First Search LTL Model-Checking

by Jakub Chaloupka
"... We propose a practical parallel on-the-fly algorithm for enumerative LTL model-checking. The algorithm is designed for a cluster of workstations communicating via MPI. The detection of cycles (faulty runs) effectively employs the so called back-level edges. In particular, a parallel level-synchroniz ..."
Abstract - Add to MetaCart
-synchronized breadth-first search of the graph is performed to discover back-level edges. For each level the back-level edges are checked in parallel by a nested depthfirst search to confirm or refute the presence of a cycle. Several optimizations of the basic algorithm are presented and advantages and drawbacks

Parallel Breadth-First Search LTL Model-Checking £

by unknown authors
"... We propose a practical parallel on-the-fly algorithm for enumerative LTL model-checking. The algorithm is designed for a cluster of workstations communicating via MPI. The detection of cycles (faulty runs) effectively employs the so called back-level edges. In particular, a parallel level-synchroniz ..."
Abstract - Add to MetaCart
-synchronized breadth-first search of the graph is performed to discover back-level edges. For each level the back-level edges are checked in parallel by a nested depthfirst search to confirm or refute the presence of a cycle. Several optimizations of the basic algorithm are presented and advantages and drawbacks

The click modular router

by Eddie Kohler , 2001
"... Click is a new software architecture for building flexible and configurable routers. A Click router is assembled from packet processing modules called elements. Individual elements implement simple router functions like packet classification, queueing, scheduling, and interfacing with network devic ..."
Abstract - Cited by 1155 (28 self) - Add to MetaCart
Click is a new software architecture for building flexible and configurable routers. A Click router is assembled from packet processing modules called elements. Individual elements implement simple router functions like packet classification, queueing, scheduling, and interfacing with network
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