### Table 2 shows the number of cycles of target enlargement that was possible with each of the designs within 200 Mbytes of memory. While the size of the Binary Decision Diagrams(BDDs) is not very large, computing the next larger preimage for all the examples except Inbox, MC1, and MC2 (Small), exceeded the memory limit [1].

1998

"... In PAGE 2: ... Table2 Target Enlargement Table 3 shows the number of visited states and explored states. The number of visited states includes those that eventually became explored states.... ..."

Cited by 58

### Table 2 shows the number of cycles of target enlargement that was possible with each of the designs within 200 Mbytes of memory. While the size of the Binary Decision Diagrams(BDDs) is not very large, computing the next larger preimage for all the examples except Inbox, MC1, and MC2 (Small), exceeded the memory limit [1].

"... In PAGE 2: ... Table2 Target Enlargement Table 3 shows the number of visited states and explored states. The number of visited states includes those that eventually became explored states.... ..."

### Table 2 shows the number of cycles of target enlargement that was possible with each of the designs within 200 Mbytes of memory. While the size of the Binary Decision Diagrams(BDDs) is not very large, computing the next larger preimage for all the examples except Inbox, MC1, and MC2 (Small), exceeded the memory limit [1].

"... In PAGE 2: ... Table2 Target Enlargement Table 3 shows the number of visited states and explored states. The number of visited states includes those that eventually became explored states.... ..."

### Table 6.2: The columns headed with name of heuristics report the total number of nodes and height after converting all the primary outputs to ordered binary decision diagrams. The two last rows report the total number of nodes and the total height over all examples. We used the cost function siscount to count the number of nodes in an obdd. For each example we use italics to indicate which heuristics found the best variable order.

1994

### Table 1: The benchmarks ports are counted as both input and output ports. The rest of the paper is organized as follows. Section 2 describes BDDs. Section 3 describes how we determine fanout free regions. In general, there are many BDDs that correspond to a given combinatorial circuit. Therefore, Section 4 describes our heuristics for constructing a good BDD for a fanout free region. Section 5 describes how partitions are scheduled. Section 6 shows how C code is generated for the entire circuit. Section 7 compares the performance of our approach with that of oblivious simulation. Finally, Section 8 presents some conclusions and discusses future work. 2 Binary Decision Diagrams(BDDs) A binary decision diagram is a representation of a boolean expression [3, 18]. A BDD b represents the boolean expression f if f is written as f = xf0+xf1 (called the Shannon 3

1995

"... In PAGE 2: ...org. Table1 describes these benchmarks in details. In circuit Diffeq, all 36 bidirectional... ..."

Cited by 1

### Table 1 Event Tree Dependent path probabilities

"... In PAGE 10: ...103249 0.0 Table1 Comparison of Event Tree Results 8. Binary Decision Diagrams Binary Decision Diagrams (BDD) provide an alternative logic form to the fault tree structure to express the system failure causes.... ..."

### Table 2: Results obtained by adding model reduction techniques. 7.2 Future Work Although the model reduction techniques described here reduce a model apos;s state space, complex models can still be constructed that cannot be handled in the available memory. It may be possible to use compositional techniques [1, 16] to handle such models: instead of model checking a complete model, the model is decomposed into manageable parts which are validated separately. Another possibility to reduce the memory requirements during model checking is to use a binary decision diagram (BDD) [70] to represent the visited states instead of a state space cache or a bit vector. BDDs are used in a number of current model checking systems [34, 53, 71]. Other model reduction techniques which have been investigated include exploiting symmetry [22], abstractions [23] and unfoldings [72].

"... In PAGE 102: ... For the partial order semantic rule and transition folding only communication transitions were considered eligible. DFS Sleep POSR Folding Sleep+POSR+Folding States Explored 5809 2686 4450 4338 1112 Time (seconds) 6:3 2:8 4:9 4:6 1:4 In Table2 the reduction in the number of unique states generated for the elevator, com- munication bridge and the X-Windows models are given. For the partial order semantic rule and transition folding only communication transitions were considered eligible.... In PAGE 102: ... While generating the state space of the X-Windows model over-writes did occur and therefore the number of unique states visited cannot be determined. The number of unique states in Table2 for the X-Windows model... ..."

### Table 6.6: Same as Table 6.5 except that we here compare obdds. here work well as a general ordering heuristic. All the heuristics are far from obtaining the best total, and all fail badly on a few examples. For reasonable sized examples it may be worthwhile to try a number of di erent heuristics and pick the best result as we have done. 6.4 SplitOrder heuristic We now turn to the SplitOrder heuristic, which is especially well suited for nding good variable orders for ordered binary decision diagrams. Unlike the depth- rst ordering heuristics, SplitOrder is not traversal-based|instead it constructs an obdd top-down one level at a time. Even though the heuristic is targeted towards nding good orders for obdds we found that a good order for an obdd is rarely a bad order for an if-then-else dag. We compare SplitOrder to several depth- rst ordering heuristics and show that when converting to obdds SplitOrder averages 25% fewer nodes than taking the best of 8 depth- rst techniques (36%

1994

### Table 2 Translation of -formulas.

"... In PAGE 17: ... In his paper, he also points out that not only boolean expressions but also binary decision diagrams can be implemented by our method. The algorithm for translating -formulas to their representations is de- scribed by the function trans(e; x; y) in Table2 . One can obtain the represen- tation of -formula e by computing trans(e; output+; output?).... ..."