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363
The Elusive Atomic Register
, 1992
"... We present a construction of a singlewriter, multiplereader atomic register from singlewriter, singlereader atomic registers. The complexity of our construction is asymptotically optimal; O(M² + MN) shared singlewriter, singlereader safe bits are required to construct a singlewriter, Mrea ..."
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Cited by 31 (4 self)
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We present a construction of a singlewriter, multiplereader atomic register from singlewriter, singlereader atomic registers. The complexity of our construction is asymptotically optimal; O(M² + MN) shared singlewriter, singlereader safe bits are required to construct a singlewriter, M
A note on the Elusive Atomic Register
, 2001
"... A timeefficient version of the Elusive Atomic Register of Singh, Anderson, and Gouda [SAG] is presented and its correctness is proved. The concurrent ..."
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A timeefficient version of the Elusive Atomic Register of Singh, Anderson, and Gouda [SAG] is presented and its correctness is proved. The concurrent
Constructing TwoWriter Atomic Registers
, 1987
"... In this paper, we construct a 2writer, nreader atomic memory register from two lwriter, (n + l)reader atomic memory registers. There are no restrictions on the size of the constructed register. The simulation requires only a single extra bit per real register, and can survive the failure of any ..."
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Cited by 72 (0 self)
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In this paper, we construct a 2writer, nreader atomic memory register from two lwriter, (n + l)reader atomic memory registers. There are no restrictions on the size of the constructed register. The simulation requires only a single extra bit per real register, and can survive the failure of any
On Interprocess Communication and the Implementation of MultiWriter Atomic Registers
, 1995
"... Two protocols for implementing nwriter mreader atomic registers with 1writer mreader atomic registers are described. In order to give complete proofs, a theory of interprocess communication is presented rst. The correctness of a protocol that implements an atomic register is proved here in t ..."
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Cited by 19 (7 self)
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Two protocols for implementing nwriter mreader atomic registers with 1writer mreader atomic registers are described. In order to give complete proofs, a theory of interprocess communication is presented rst. The correctness of a protocol that implements an atomic register is proved here
OneWrite Algorithms for Multivalued Regular and Atomic Registers
"... This paper presents an algorithm for implementing a kvalued regular register (the logical register) using k(k \Gamma 1)=2 binary regular registers (the physical registers) that requires only one physical write per logical write. The same algorithm using binary atomic registers implements a kvalued ..."
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Cited by 1 (0 self)
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This paper presents an algorithm for implementing a kvalued regular register (the logical register) using k(k \Gamma 1)=2 binary regular registers (the physical registers) that requires only one physical write per logical write. The same algorithm using binary atomic registers implements a k
A New Characterization of Atomic Registers sharedmemory
, 2008
"... We study the fundamental communication properties of two major sharedmemory models, namely the ones in which processes communicate via SingleWriter/MultiReader (SWMR for short) atomic registers and AtomicSnapshot object, respectively. In 1998, Gafni already adressed this question. We prove in th ..."
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We study the fundamental communication properties of two major sharedmemory models, namely the ones in which processes communicate via SingleWriter/MultiReader (SWMR for short) atomic registers and AtomicSnapshot object, respectively. In 1998, Gafni already adressed this question. We prove
Optimal MultiWriter MultiReader Atomic Register
 In Proceedings of the 11th ACM Symposium on Principles of Distributed Computing
, 1992
"... . This paper addresses the wide gap in space complexity of atomic, multiwriter, multireader register implementations. While the space complexity of all previous implementations is linear, the lower bounds are logarithmic. We present two implementations which close this gap: The first implementation ..."
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Cited by 22 (0 self)
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. This paper addresses the wide gap in space complexity of atomic, multiwriter, multireader register implementations. While the space complexity of all previous implementations is linear, the lower bounds are logarithmic. We present two implementations which close this gap: The first
The elusive atomic register. To appear in Journal of the ACM. A preliminary version, 'The elusive atomic register revisited', appeared
 in the Proceedings of the Sixth Annual Symposium on Principles of Distributed Computing
, 1987
"... We present a construction of a singlewriter, multiplereader atomic register from singlewriter, singlereader atomic registers. The complexity of our construction is asymptotically optimal � O(M 2 + MN) shared singlewriter, singlereader safe bits are required to construct a singlewriter, Mread ..."
Abstract

Cited by 1 (0 self)
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We present a construction of a singlewriter, multiplereader atomic register from singlewriter, singlereader atomic registers. The complexity of our construction is asymptotically optimal � O(M 2 + MN) shared singlewriter, singlereader safe bits are required to construct a singlewriter, M
whh354 – 1 Specifications, Refinements, and Atomic Registers
, 2006
"... Sequential programs and algorithms are usually specified by means of preconditions and postconditions. This is not possible for concurrent and reactive programs, since their behaviour during execution is more interesting than their final states, even ..."
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Sequential programs and algorithms are usually specified by means of preconditions and postconditions. This is not possible for concurrent and reactive programs, since their behaviour during execution is more interesting than their final states, even
Beyond Atomic Registers: Bounded WaitFree Implementations of Nontrivial Objects
, 1992
"... We de ne a class of operations called pseudo readmodifywrite (PRMW) operations, and show that nontrivial shared data objects with such operations can be implemented in a bounded, waitfree manner from atomic registers. A PRMW operation is similar to a \true " readmodifywrite (RMW) oper ..."
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Cited by 10 (2 self)
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We de ne a class of operations called pseudo readmodifywrite (PRMW) operations, and show that nontrivial shared data objects with such operations can be implemented in a bounded, waitfree manner from atomic registers. A PRMW operation is similar to a \true " readmodifywrite (RMW
Results 1  10
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363