Results 1 - 10 of 58

Time-interleaved analog-todigital converters: Status and future directions

by Christian Vogel, Hakan Johansson - in Proceedings of the 2006 IEEE International Symposium on Circuits and Systems ISCAS , 2006
"... Abstract- We discuss time-interleaved analog-to-digital converters fsM o27 = TI-ADC (ADCs) as a prime example of merging analog and digital signal processing. A time-interleaved ADC (TI-ADC) consists of M parallel ADC channel ADCs that alternately take samples from the input signal, where l the samp ..."
Abstract - Cited by 20 (10 self) - Add to MetaCart
Abstract- We discuss time-interleaved analog-to-digital converters fsM o27 = TI-ADC (ADCs) as a prime example of merging analog and digital signal processing. A time-interleaved ADC (TI-ADC) consists of M parallel ADC channel ADCs that alternately take samples from the input signal, where l

Online calibration of a nyquist-rate analog-todigital converter using output code-density histograms

by Udaykiran Eduri, Franco Maloberti - IEEE Transactions on Circuits and Systems , 2004
"... Abstract—A scheme for the online correction of static nonlin-earities in a Nyquist-rate analog-to-digital converter (ADC), using output code-density histograms, is presented. The estimation of the integral nonlinearity (INL) at each output level, followed by the creation of a corresponding entry in ..."
Abstract - Cited by 2 (0 self) - Add to MetaCart
Abstract—A scheme for the online correction of static nonlin-earities in a Nyquist-rate analog-to-digital converter (ADC), using output code-density histograms, is presented. The estimation of the integral nonlinearity (INL) at each output level, followed by the creation of a corresponding entry

ANALOG INPUT CLOCK INPUT CONTROL

by Power Supply
"... Since designing a system that uses a high speed analog-todigital converter (ADC) is challenging, this notebook provides an overview of the basic design considerations. ..."
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Since designing a system that uses a high speed analog-todigital converter (ADC) is challenging, this notebook provides an overview of the basic design considerations.

ANALOG INPUT CLOCK INPUT CONTROL

by unknown authors
"... Since jitter around the threshold region of a clock interface can corrupt the dynamic performance of an analog-todigital converter (ADC), this notebook provides an overview ..."
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Since jitter around the threshold region of a clock interface can corrupt the dynamic performance of an analog-todigital converter (ADC), this notebook provides an overview

unknown title

by unknown authors
"... The high density of the hardware for the HP E1413 scanning analog-todigital converter, the low cost per channel, and the wide variety of optional signal conditioning plug-ons require a production test strategy that is fast, ..."
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The high density of the hardware for the HP E1413 scanning analog-todigital converter, the low cost per channel, and the wide variety of optional signal conditioning plug-ons require a production test strategy that is fast,

unknown title

by unknown authors
"... The high density of the hardware for the HP E1413 scanning analog-todigital converter, the low cost per channel, and the wide variety of optional signal conditioning plug-ons require a production test strategy that is fast, ..."
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The high density of the hardware for the HP E1413 scanning analog-todigital converter, the low cost per channel, and the wide variety of optional signal conditioning plug-ons require a production test strategy that is fast,

Analog

by Getting Started, Analog-to-digital Converters
"... Basic analog-to-digital converter terminology will be covered first, followed by configuration of the analog-to-digital converter peripheral. Next, information on the usage of the peripheral will be presented, initially focusing on the 8-bit analog-todigital converter. Then the differences between t ..."
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Basic analog-to-digital converter terminology will be covered first, followed by configuration of the analog-to-digital converter peripheral. Next, information on the usage of the peripheral will be presented, initially focusing on the 8-bit analog-todigital converter. Then the differences between

A 1.5-V, 10-bit, 200-MS/s CMOS Pipeline Analog-to- Digital Converter

by Manjudevi Arunkumar, P Chavan, K. N Muralidhara, Ph. D
"... Analog-to-digital converters (ADCs) are required in almost all communication and signal processing applications. This paper describes a 1.5-v, 10-bit, 200-Msample/s pipeline analog-todigital converter in 0.18-µm CMOS technology. The entire circuit architecture is built with a modular approach consis ..."
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Analog-to-digital converters (ADCs) are required in almost all communication and signal processing applications. This paper describes a 1.5-v, 10-bit, 200-Msample/s pipeline analog-todigital converter in 0.18-µm CMOS technology. The entire circuit architecture is built with a modular approach

16-Channel Oversampled Analog-to-Digital converter

by Shujaat Nadeem, Charles G. Sodini, et al. , 1994
"... Oversampled Analog-to-Digital conversion has been demonstrated to be an effective technique for high resolution analog-to-digital (A/D) conversion that is tolerant to process imperfections. The area and power budget of conventionally designed oversampled analog-to-digital converters has precluded th ..."
Abstract - Cited by 5 (0 self) - Add to MetaCart
their application from areas where a large number of low frequency signals need to be converted simultaneously. A new oversampled A/D design methodology is proposed to cut the area and power budget per channel of an oversampled analog-todigital converter. The design and implementation of a 16-channel oversampled

On Blind Identification of Gain and Timing Mismatches in Time-Interleaved Analog-to-Digital Converters

by Shahzad Saleem, Christian Vogel - 33RD INTERNATIONAL CONFERENCE ON TELECOMMUNICATIONS AND SIGNAL PROCESSING- TSP 2010 , 2010
"... Gain and timing mismatches in a time-interleaved analog-todigital converter (TI-ADC) cause spurious images in its output spectrum thus effecting its performance. In this paper. we present an efficient digital blind identification structure to adaptively estimate gain and timing mismatches by using ..."
Abstract - Cited by 3 (2 self) - Add to MetaCart
Gain and timing mismatches in a time-interleaved analog-todigital converter (TI-ADC) cause spurious images in its output spectrum thus effecting its performance. In this paper. we present an efficient digital blind identification structure to adaptively estimate gain and timing mismatches by using
Results 1 - 10 of 58