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602
Experience with embedding hardware description languages in HOL
- Theorem Provers in Circuit Design
, 1992
"... Abstract The semantics of hardware description languages can be represented in higher order logic. This provides a formal definition that is suitable for machine processing. Experiments are in progress at Cambridge to see whether this method can be the basis of practical tools based on the HOL theor ..."
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Cited by 40 (5 self)
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Abstract The semantics of hardware description languages can be represented in higher order logic. This provides a formal definition that is suitable for machine processing. Experiments are in progress at Cambridge to see whether this method can be the basis of practical tools based on the HOL
STATEMATE: A Working Environment for the Development of Complex Reactive Systems
- IEEE Transactions on Software Engineering
, 1990
"... This paper provides an overview of the STATEMATE system, constructed over the past several years by the authors and their colleagues at Ad Cad Ltd., the R&D subsidiary of i-Logix, Inc. STATEMATE is a set of tools, with a heavy graphical orientation, in- tended for the specification, analysis, d ..."
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Cited by 485 (7 self)
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, design, and documentation of large and complex reactive systems, such as real-time embedded sys- tems, control and communication systems, and interactive software or hardware. It enables a user to prepare, analyze, and debug diagram- matic, yet precise, descriptions of the system under development from
Protocol Verification as a Hardware Design Aid
- IN IEEE INTERNATIONAL CONFERENCE ON COMPUTER DESIGN: VLSI IN COMPUTERS AND PROCESSORS
, 1992
"... The role of automatic formal protocol verification in hardware design is considered. Principles are identified that maximize the benefits of protocol verification while minimizing the labor and computation required. A new protocol description language and verifier (both called Mur') are descri ..."
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Cited by 275 (27 self)
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The role of automatic formal protocol verification in hardware design is considered. Principles are identified that maximize the benefits of protocol verification while minimizing the labor and computation required. A new protocol description language and verifier (both called Mur
On the Embedding of the MDG Specification Languages in HOL
"... In this paper, we propose an embedding of the MDG input languages in HOL. The MDG (Multiway Decision Graph) system is a tool for equivalence and model checking. It is based on multiway decision graphs that extend Reduced-Ordered Binary Decision Diagrams with abstract sorts and uninterpreted function ..."
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functions, prime feature of the MDG. The HOL system is a higher-order logic theorem prover. It has an open user-extensible architecture, giving the possibility of adding expressiveness power to the theorem prover by embedding new theories. We have embedded in HOL the grammar of the MDG hardware description
The HOL System DESCRIPTION Preface
, 2011
"... This volume contains the description of the HOL system. making up the documentation for HOL: It is one of four volumes (i) LOGIC: a formal description of the higher order logic implemented by the HOL system. (ii) TUTORIAL: a tutorial introduction to HOL, with case studies. (iii) DESCRIPTION: a detai ..."
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detailed user’s guide for the HOL system; (iv) REFERENCE: the reference manual for HOL. These four documents will be referred to by the short names (in small slanted capitals) given above. This document, DESCRIPTION, is an advanced guide for users with some prior experience of the system. Beginners should
The HOL System DESCRIPTION Preface
, 2012
"... This volume contains the description of the HOL system. making up the documentation for HOL: It is one of four volumes (i) LOGIC: a formal description of the higher order logic implemented by the HOL system. (ii) TUTORIAL: a tutorial introduction to HOL, with case studies. (iii) DESCRIPTION: a detai ..."
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detailed user’s guide for the HOL system; (iv) REFERENCE: the reference manual for HOL. These four documents will be referred to by the short names (in small slanted capitals) given above. This document, DESCRIPTION, is an advanced guide for users with some prior experience of the system. Beginners should
The HOL System DESCRIPTION Preface
, 2010
"... This volume contains the description of the HOL system. making up the documentation for HOL: It is one of four volumes (i) LOGIC: a formal description of the higher order logic implemented by the HOL system. (ii) TUTORIAL: a tutorial introduction to HOL, with case studies. (iii) DESCRIPTION: a detai ..."
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detailed user’s guide for the HOL system; (iv) REFERENCE: the reference manual for HOL. These four documents will be referred to by the short names (in small slanted capitals) given above. This document, DESCRIPTION, is an advanced guide for users with some prior experience of the system. Beginners should
The HOL System DESCRIPTION Preface
, 2009
"... This volume contains the description of the HOL system. making up the documentation for HOL: It is one of four volumes (i) LOGIC: a formal description of the higher order logic implemented by the HOL system. (ii) TUTORIAL: a tutorial introduction to HOL, with case studies. (iii) DESCRIPTION: a detai ..."
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detailed user’s guide for the HOL system; (iv) REFERENCE: the reference manual for HOL. These four documents will be referred to by the short names (in small slanted capitals) given above. This document, DESCRIPTION, is an advanced guide for users with some prior experience of the system. Beginners should
An Embedded Language Framework for Hardware Compilation
- DESIGNING CORRECT CIRCUITS
, 2002
"... Various languages have been proposed to describe synchronous hardware at an abstract, yet synthesisable level. We propose a uniform framework within which such languages can be developed, and combined together for simulation, synthesis, and verification. We do this by embedding the languages in Lava ..."
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Cited by 23 (12 self)
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in Lava --- a hardware description language (HDL), itself embedded in the functional programming language Haskell. The approach allows us to easily experiment with new formal languages and language features, and also provides easy access to formal verification tools aiding program verification.
A HOL Embedding of a Small Parallel HDL
"... This paper reports work-in-progress on the embedding of a small hardware description language in HOL. Our language is a subset of ADDL, a language used to write design specifications for the CAMAD synthesis tool developed in Linkoping. Our intention is to mechanise transformational reasoning about A ..."
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This paper reports work-in-progress on the embedding of a small hardware description language in HOL. Our language is a subset of ADDL, a language used to write design specifications for the CAMAD synthesis tool developed in Linkoping. Our intention is to mechanise transformational reasoning about
Results 1 - 10
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