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Computer Architecture: A Quantitative Approach -- Fourth Edition

by John L. Hennessy, et al.
"... ..."
Abstract - Cited by 4934 (43 self) - Add to MetaCart
Abstract not found

A Case For Grid Computing On Virtual Machines

by Renato J. Figueiredo, Peter A. Dinda, Jose A. B. Fortes , 2002
"... We advocate a novel approach to grid computing that is based on a combination of "classic" operating system level virtual machines (VMs) and middleware mechanisms to manage VMs in a distributed environment. The abstraction is that of dynamically instantiated and mobile VMs that are a combi ..."
Abstract - Cited by 169 (29 self) - Add to MetaCart
from a performance perspective. Finally, we describe the middleware challenges implied by the approach and an architecture for grid computing using virtual machines.

Understanding and Designing New Server Architectures for Emerging Warehouse-Computing Environments

by Kevin Lim, Parthasarathy Ranganathan, Jichuan Chang, Chandrakant Patel, Trevor Mudge, Steven Reinhardt - INTERNATIONAL SYMPOSIUM ON COMPUTER ARCHITECTURE , 2008
"... This paper seeks to understand and design nextgeneration servers for emerging “warehouse-computing” environments. We make two key contributions. First, we put together a detailed evaluation infrastructure including a new benchmark suite for warehouse-computing workloads, and detailed performance, co ..."
Abstract - Cited by 92 (13 self) - Add to MetaCart
, cost, and power models, to quantitatively characterize bottlenecks. Second, we study a new solution that incorporates volume nonserver-class components in novel packaging solutions, with memory sharing and flash-based disk caching. Our results show that this approach has promise, with a 2X improvement

On schemes of combinatorial transcription logic.

by Nicolas E Buchler , Ulrich Gerland , Terence Hwa - Proc. Natl. Acad. Sci. USA , 2003
"... Cells receive a wide variety of cellular and environmental signals, which are often processed combinatorially to generate specific genetic responses. Here we explore theoretically the potentials and limitations of combinatorial signal integration at the level of cisregulatory transcription control. ..."
Abstract - Cited by 141 (1 self) - Add to MetaCart
-regulatory region. The architectures that emerge are naturally modular and evolvable. Our results suggest that the transcription regulatory apparatus is a ''programmable'' computing machine, belonging formally to the class of Boltzmann machines. Crucial to our results is the ability to regulate

fiber tractography using DT-MRI data

by Peter J. Basser, Sinisa Pajevic, Carlo Pierpaoli, Jeffrey Duda, Akram Aldroubi - Magn. Reson. Med , 2000
"... Fiber tract trajectories in coherently organized brain white matter pathways were computed from in vivo diffusion tensor magnetic resonance imaging (DT-MRI) data. First, a continuous diffusion tensor field is constructed from this discrete, noisy, measured DT-MRI data. Then a Frenet equation, descri ..."
Abstract - Cited by 124 (3 self) - Add to MetaCart
tract directions is nonuniform. Moreover, background noise in diffusionweighted MRIs can cause a computed trajectory to hop from tract to tract. Still, this method can provide quantitative information with which to visualize and study connectivity and continuity of neural pathways in the central

Quantitative Comparison of Architectures for Digital Neuro-Computers

by Paolo Ienne - Proceedings of the IJCNN-93-Nagoya , 1993
"... As the field of neural-networks matures toward real-world applications, a strong need for hardware systems to efficiently compute larger network arises. Comparisons between neural-networks dedicated platforms are often fragmentary or qualitative. An architectural level evaluation scheme is attempted ..."
Abstract - Cited by 2 (0 self) - Add to MetaCart
As the field of neural-networks matures toward real-world applications, a strong need for hardware systems to efficiently compute larger network arises. Comparisons between neural-networks dedicated platforms are often fragmentary or qualitative. An architectural level evaluation scheme

Advances in Computer Architecture

by Andy D. Pimentel
"... Using previous material from prof.dr. C. Jesshope and dr. R. PossAims of this course The aims of this course are: to give a thorough understanding of modern microprocessor design and related issues to introduce you to parallelism in computer architecture You should already have an understanding of i ..."
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of instruction set design and the principles and operation of pipelined processorsBibliography The main course text is: Computer architecture- a quantitative approach, Hennessy &

Dynamic Precision Management for Loop Computations on Reconfigurable Architectures

by Kiran Bondalapati, Viktor K. Prasanna - In IEEE Symposium on FPGAs for Custom Computing Machines , 1999
"... Reconfigurable architectures promise significant performance benefits by customizing the configurations to suit the computations. Variable precision for computations is one important method of customization for which reconfigurable architectures are well suited. The precision of the operations can b ..."
Abstract - Cited by 27 (8 self) - Add to MetaCart
be modified dynamically at run-time to match the precision of the operands. Though the advantages of reconfigurable architectures for dynamic precision have been discussed before, we are not aware of any work which analyzes the qualitative and quantitative benefits which can be achieved. This paper develops a

W&E 8.2.1- Adders References Hennessy and Patterson “Computer Architecture a Quantitative Approach”

by Aen Ee Lecture
"... Somewhat surprisingly datapaths often contain many simple cells – latches to stage data (especially in a pipelined machine) and tristate drivers to drive the bus lines. But these cells are pretty simple. Since these units implement the dataflow portion of an algorithm, they tend to operate on number ..."
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Somewhat surprisingly datapaths often contain many simple cells – latches to stage data (especially in a pipelined machine) and tristate drivers to drive the bus lines. But these cells are pretty simple. Since these units implement the dataflow portion of an algorithm, they tend to operate

Toward Scalable Cache Only Memory Architectures

by Erik Hagersten - SWEDISH INSTITUTE OF COMPUTER SCIENCE , 1993
"... HIGH PERFORMANCE at a low cost is the common goal of most new computers. Even if the speed of microprocessors seems to double every year, there are, and will always be, important applications demanding even better performance. There are twoways of meeting this demand: a single processor designed wit ..."
Abstract - Cited by 46 (1 self) - Add to MetaCart
. COMAs were shown to have superior performance over alternative shared memory architectures in a quantitative analytical performance study. The implementation proposal for the DDM has been simulated with good performance results. Two optimization techniques have also been proposed; ha...
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