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621
Multiprecision Division on an 8-Bit Processor
- in Proc. 13th IEEE Symp. Computer Arithmetic, IEEE CS
, 1997
"... Small processors can be especially useful in massively parallel architectures. This paper considers multiprecision division algorithms on an 8-bit processor (the Kestrel processor, currently in fabrication) that includes a small amount of memory and an 8-bit multiplier. We evaluate several variation ..."
Abstract
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Cited by 5 (5 self)
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Small processors can be especially useful in massively parallel architectures. This paper considers multiprecision division algorithms on an 8-bit processor (the Kestrel processor, currently in fabrication) that includes a small amount of memory and an 8-bit multiplier. We evaluate several
Reconfigurable instruction set extension for enabling ECC on an 8-bit processor
- IN FIELD PROGRAMMABLE LOGIC AND APPLICATION — FPL 2004, LNCS 3203
, 2004
"... Abstract. Pervasive networks with low-cost embedded 8-bit processors are set to change our day-to-day life. Public-key cryptography provides crucial functionality to assure security which is often an important requirement in pervasive applications. However, it has been the hardest to implement on co ..."
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Cited by 16 (2 self)
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Abstract. Pervasive networks with low-cost embedded 8-bit processors are set to change our day-to-day life. Public-key cryptography provides crucial functionality to assure security which is often an important requirement in pervasive applications. However, it has been the hardest to implement
• Windows CE • 53 8-bit processors • 11 32-bit processors
"... • Human network based content dissemination and sensing • Wildlife monitoring through sensor networks • Vehicular networkingWhat is covered in these lectures • General understanding and applications of: • Mobile Systems and Networks: cellular, ad hoc, delay tolerant ..."
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• Human network based content dissemination and sensing • Wildlife monitoring through sensor networks • Vehicular networkingWhat is covered in these lectures • General understanding and applications of: • Mobile Systems and Networks: cellular, ad hoc, delay tolerant
RoadRunneR: A Small And Fast Bitslice Block Cipher For Low Cost 8-bit Processors
"... Abstract. Designing block ciphers targeting resource constrained 8-bit CPUs is a challenging problem. There are many recent lightweight ci-phers designed for better performance in hardware. On the other hand, most software efficient lightweight ciphers either lack a security proof or have a low secu ..."
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Abstract. Designing block ciphers targeting resource constrained 8-bit CPUs is a challenging problem. There are many recent lightweight ci-phers designed for better performance in hardware. On the other hand, most software efficient lightweight ciphers either lack a security proof or have a low
Stochastic processors
- In NSF Workshop on Science of Power Management
, 2009
"... Abstract- Proposed paper is the study of unpipelined architecture of a 8 bit Pico Processor (pP) [3][4] and how its overall through put can be increased by implementing pipelining. Pico processor is an 8 bit processor which is similar to 8 bit microprocessors for small embedded applications and it i ..."
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Cited by 6 (6 self)
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Abstract- Proposed paper is the study of unpipelined architecture of a 8 bit Pico Processor (pP) [3][4] and how its overall through put can be increased by implementing pipelining. Pico processor is an 8 bit processor which is similar to 8 bit microprocessors for small embedded applications
Comparing elliptic curve cryptography and RSA on 8bit CPUs
- in Proc. of the Sixth Workshop on Crypto- graphic Hardware and Embedded Systems (CHES’04
, 2004
"... Abstract. Strong public-key cryptography is often considered to be too computationally expensive for small devices if not accelerated by crypto-graphic hardware. We revisited this statement and implemented elliptic curve point multiplication for 160-bit, 192-bit, and 224-bit NIST/SECG curves over GF ..."
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Cited by 189 (2 self)
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GF(p) and RSA-1024 and RSA-2048 on two 8-bit micro-controllers. To accelerate multiple-precision multiplication, we propose a new algorithm to reduce the number of memory accesses. Implementation and analysis led to three observations: 1. Public-key cryptography is viable on small devices without
A Novel Argument to Use 8-BIT Media Processor for Low Power VLSI Design
"... ABSTRACT: A novel idea pertaining to the selection of a processor size for low power IC applications has been proposed. 8-bit processors were introduced in the beginning by Intel. Later, technology has rapidly advanced forcing the designers to go for 32-bit and 64-bit processors for edge cutting, hi ..."
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ABSTRACT: A novel idea pertaining to the selection of a processor size for low power IC applications has been proposed. 8-bit processors were introduced in the beginning by Intel. Later, technology has rapidly advanced forcing the designers to go for 32-bit and 64-bit processors for edge cutting
Efficient RingLWE encryption on 8-bit AVR processors
- Handschuh (Eds.), CHES 2015, Vol. 9293 of LNCS
, 2015
"... Abstract. Public-key cryptography based on the “ring-variant ” of the Learning with Errors (ring-LWE) problem is both efficient and believed to remain secure in a post-quantum world. In this paper, we introduce a carefully-optimized implementation of a ring-LWE encryption scheme for 8-bit AVR proces ..."
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Cited by 3 (0 self)
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. On the other hand, for long-term security, the execution time of key-generation, encryption, and decryption amount to 2.2 M, 2.6 M, and 686 k cycles, respectively. These results set new speed records for ring-LWE encryption on an 8-bit processor and outperform related RSA and ECC implementations by an order
Kestrel: Design of an 8-bit SIMD parallel processor
, 1997
"... Kestrel is a high-performance programmable parallel co-processor. Its design is the result of examination and reexaminataon of algorathmic, architectural, packaging, and szlacon design assues, and the anterrelations between them. The final system features a lznear array of 8-bat processing elements, ..."
Abstract
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Cited by 6 (5 self)
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Kestrel is a high-performance programmable parallel co-processor. Its design is the result of examination and reexaminataon of algorathmic, architectural, packaging, and szlacon design assues, and the anterrelations between them. The final system features a lznear array of 8-bat processing elements
High Data Rate 8-bit crypto-processor
- Proc. Peer-reviewed Proceedings (ISBN 1-86854-522-9) of the ISSA 2004 enabling tomorrow Conference, 30 June - 2 July 2004, Gallagher Estate
"... This paper describes a high data rate 8-bit Crypto Processor based on Advanced Encryption Standard (Rijndael algorithm). Though the algorithm requires 32-bit wide data path but our novel mix-column architecture makes the algorithm works in a true byte systolic fashion. Initial stages are merged to r ..."
Abstract
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Cited by 2 (1 self)
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This paper describes a high data rate 8-bit Crypto Processor based on Advanced Encryption Standard (Rijndael algorithm). Though the algorithm requires 32-bit wide data path but our novel mix-column architecture makes the algorithm works in a true byte systolic fashion. Initial stages are merged
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621
