Results 1 - 10 of 537

Engineering a Sorted List Data Structure for 32 Bit Keys

by Roman Dementiev, Lutz Kettner, Jens Mehnert, Peter Sanders
"... Search tree data structures like van Emde Boas (vEB) trees are a theoretically attractive alternative to comparison based search trees because they have better asymptotic performance for small integer keys and large inputs. This paper studies their practicability using 32 bit keys as an example. Whi ..."
Abstract - Cited by 4 (0 self) - Add to MetaCart
Search tree data structures like van Emde Boas (vEB) trees are a theoretically attractive alternative to comparison based search trees because they have better asymptotic performance for small integer keys and large inputs. This paper studies their practicability using 32 bit keys as an example

The RC5 Encryption Algorithm

by Ronald L. Rivest , 1995
"... Abstract. This document describes the RC5 encryption algorithm. RC5 is a fast symmetric block cipher suitable for hardware or software implementations. A novel feature of RC5 is the heavy use of data-dependent rotations. RC5 has a variable word size, a variable number of rounds, and a variable-lengt ..."
Abstract - Cited by 363 (7 self) - Add to MetaCart
-length secret key. 1 AParameterized Family of Encryption Algorithms RC5 is word-oriented: all of the primitive operations work on w-bit words as their basic unit of information. Here we assume w = 32, although the formal speci cation of RC5 admits variants for other word lengths, such asw = 64 bits. RC5 has two

Sequence of 32-Bit Pseudo Random Key for Encryption and Decryption of Text Message

by Bangalore Karnataka India
"... In today‟s world, all the e-commerce transaction happens over the internet. The data that is transferred over the internet needs to be secured before the transmission process happens. The proposed scheme is a FPGA implementation of Park-Miller algorithm for generating sequence of Pseudo-Random keys. ..."
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point divider for division and a finite state machine for the flow of Park-Miller algorithm operation. After generating a sequence of 32-bit pseudo-random numbers, it is used as a key to encrypt the text message which is known as cipher text. Using the same key to decrypt the encrypted data to get back

A Comparison of Sorting Algorithms for the Connection Machine CM-2

by Guy E. Blelloch, Charles E. Leiserson, Bruce M. Maggs, C. Greg Plaxton, Stephen J. Smith, Marco Zagha
"... We have implemented three parallel sorting algorithms on the Connection Machine Supercomputer model CM-2: Batcher's bitonic sort, a parallel radix sort, and a sample sort similar to Reif and Valiant's flashsort. We have also evaluated the implementation of many other sorting algorithms pro ..."
Abstract - Cited by 192 (7 self) - Add to MetaCart
proposed in the literature. Our computational experiments show that the sample sort algorithm, which is a theoretically efficient "randomized" algorithm, is the fastest of the three algorithms on large data sets. On a 64K-processor CM-2, our sample sort implementation can sort 32 10 6 64-bit keys

Parallel Collision Search with Cryptanalytic Applications

by Paul C. Van Oorschot, Michael J. Wiener - Journal of Cryptology , 1996
"... A simple new technique of parallelizing methods for solving search problems which seek collisions in pseudo-random walks is presented. This technique can be adapted to a wide range of cryptanalytic problems which can be reduced to finding collisions. General constructions are given showing how to ad ..."
Abstract - Cited by 192 (3 self) - Add to MetaCart
collisions in expected time 21 days, and the last recovers a double-DES key from 2 known plaintexts in expected time 4 years, which is four orders of magnitude faster than the conventional meet-in-the-middle attack on double-DES. Based on this attack, double-DES offers only 17 more bits of security than

A Compact 32-bit Architecture for an AES System

by Somsak Choomchuay Member, Surapong Pongyupinpanich, Somsanouk Pathumvanh
"... This paper describes a compact 32-bit architecture developed for the Rijndael ciphering/decyphering system. The implementation is complied with NIST Advanced Encryption Standard (AES). The design processes any 128-bit block data with 128-bit key. For the compact hardware, the field inversion circuit ..."
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This paper describes a compact 32-bit architecture developed for the Rijndael ciphering/decyphering system. The implementation is complied with NIST Advanced Encryption Standard (AES). The design processes any 128-bit block data with 128-bit key. For the compact hardware, the field inversion

A Compact 32-bit Architecture for an AES System

by T. Nagase, R. Koide, T. Araki, Y. Hasegawa, Somsak Choomchuay Member, Surapong Pongyupinpanich, Somsanouk Pathumvanh
"... This paper describes a compact 32-bit architecture developed for the Rijndael ciphering/decyphering system. The implementation is complied with NIST Advanced Encryption Standard (AES). The design processes any 128-bit block data with 128-bit key. For the compact hardware, the field inversion circuit ..."
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This paper describes a compact 32-bit architecture developed for the Rijndael ciphering/decyphering system. The implementation is complied with NIST Advanced Encryption Standard (AES). The design processes any 128-bit block data with 128-bit key. For the compact hardware, the field inversion

A New Low Power 32×32-bit Multiplier 1

by Pouya Asadi, Keivan Navi
"... Abstract: Multipliers are one of the most important building blocks in processors. This paper describes a low-power 32×32-bit parallel multiplier, designed and fabricated using a 0.13 µm double-metal doublepoly CMOS process. In order to achieve low-power operation, the multiplier was designed utiliz ..."
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Abstract: Multipliers are one of the most important building blocks in processors. This paper describes a low-power 32×32-bit parallel multiplier, designed and fabricated using a 0.13 µm double-metal doublepoly CMOS process. In order to achieve low-power operation, the multiplier was designed

A New Low Power 32×32-bit Multiplier

by Pouya Asadi, Keivan Navi
"... Abstract: Multipliers are one of the most important building blocks in processors. This paper describes a low-power 32×32-bit parallel multiplier, designed and fabricated using a 0.13 µm double-metal doublepoly CMOS process. In order to achieve low-power operation, the multiplier was designed utiliz ..."
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Abstract: Multipliers are one of the most important building blocks in processors. This paper describes a low-power 32×32-bit parallel multiplier, designed and fabricated using a 0.13 µm double-metal doublepoly CMOS process. In order to achieve low-power operation, the multiplier was designed

High-speed Curve25519 on 8-bit, 16-bit and 32-bit microcontrollers

by Michael Düll, Björn Haase, Gesine Hinterwälder, Michael Hutter, Christof Paar, Ana Helena Sánchez, Peter Schwabe , 2015
"... Abstract This paper presents new speed records for 128-bit secure elliptic-curve Diffie-Hellman key-exchange soft-ware on three different popular microcontroller architectures. We consider a 255-bit curve proposed by Bernstein known as Curve25519, which has also been adopted by the IETF. We optimize ..."
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optimize the X25519 key-exchange protocol proposed by Bernstein in 2006 for AVR ATmega 8-bit microcontrollers, MSP430X 16-bit microcontrollers, and for ARM Cortex-M0 32-bit microcontrollers. Our software for the AVR takes only 13 900 397 cycles for the computation of a Diffie-Hellman shared secret
Results 1 - 10 of 537