"... In PAGE 6: ... In this case, there are plenty of hidden terminal collision opportunities, as shown in Figure 14. 16 4 1 3 19 8 7 13 12 Figure 14: Two time-bounded connections in the current topology The results, reported in Table4 , 5 and 6, show the performance of various algorithms in a static situation. We note that the perfor- mance for individual connections is comparable.... ..."

"... In PAGE 4: ...ig. 2. The vacuum chamber with the Californium-252 source placed above the chip with the lid removed 3 Results An overview of the results from the fault injections, from the two different clusters with four and five nodes, is presented in this section. An example of collected data is shown in Table 1 and Table2 . Table 1 shows data logged by Node 2 during three TDMA rounds in the four-node set-up is shown in Table 1.... In PAGE 4: ... The rows, contain CNI status register data where the columns represent information such as local membership vector (Memb), controller state (C-ST) as well as error diagnosis field (Diag), logged from several TDMA slots. Table2 shows the last two TDMA slots as shown in Table 1 but logged by Node 1. In Table 1 and Table 2, Node 1 and Node 2 differ in their opinion about the last shown FI-node transmission.... In PAGE 4: ... Table 2 shows the last two TDMA slots as shown in Table 1 but logged by Node 1. In Table 1 and Table2 , Node 1 and Node 2 differ in their opinion about the last shown FI-node transmission. This is a typical logged asymmetric fault.... ..."

"... In PAGE 14: ... In this case, there are plenty of hidden terminal collision opportunities, as shown in Figure 14. 16 4 1 3 19 8 7 13 12 Figure 13: Two time-bounded connections in the current topology The results, reported in Table4 , 5 and 6, show the performance of various algorithms in a static situation. We note that the performance for individual connections is comparable.... ..."

"... In PAGE 14: ... In this case, there are plenty of hidden terminal collision opportunities, as shown in Figure 14. 16 4 1 3 19 8 7 13 12 Figure 13: Two time-bounded connections in the current topology The results, reported in Table4 , 5 and 6, showthe performance of various algorithms in a static situation. We note that the performance for individual connections is comparable.... ..."

"... In PAGE 14: ... In this case, there are plenty of hidden terminal collision opportunities, as shown in Figure 14. 16 4 1 3 19 8 7 13 12 Figure 13: Two time-bounded connections in the current topology The results, reported in Table4 , 5 and 6, show the performance of various algorithms in a static situation. We note that the performance for individual connections is comparable.... ..."

"... In PAGE 3: ...igure 13: Simulation Speed Comparison ................................................................................................ 17 List of Tables Table1 : Execution cycle counts (in millions of cycles).... In PAGE 14: ... Table1 : Execution cycle counts (in millions of cycles) For architecture Arch1, performance suffers due to frequent arbitration conflicts in the shared AHB bus. The shaded cells indicate scenarios where the bandwidth constraints for the USB and/or AVLink controller are not met.... In PAGE 14: ... The shaded cells indicate scenarios where the bandwidth constraints for the USB and/or AVLink controller are not met. From Table1 we can see that none of the arbitration policies in Arch1 satisfy the constraints. AHB System bus ARM926EJ-S MEM1 SDRAM controller DMA MEM2 A/V Encoder USB 2.... In PAGE 16: ...igure 11 (b). An AHB/AHB bridge is used to interface with the main bus. We split MEM5 and attach one of the memories (MEM6) to the dedicated bus and also add an interface to the SDRAM controller ports from the new bus, so that data traffic from the new components does not load the main bus as frequently. Table1 shows a performance improvement for Arch2 as arbitration conflicts are reduced. With the exception of the RR scheme, bandwidth constraints are met with all the other arbitration policies.... In PAGE 16: ... Next, to improve performance we allocate the A/V Decoder and AVLink components to separate AHB busses, as shown in Figure 11 (c). From Table1 we see that the performance for Arch3 improves only slightly over Arch2. The reason for the small improvement in performance is because there is not a lot of conflict (or time overlap) between transactions issued by the A/V decoder and AVLink components.... ..."

"... In PAGE 5: ...cknowledgments for all mobile stations are grouped in the same downlink control slots (i.e., eachdownlink control slot is not dedicated to a speci c mobile station). Table1 summarizes the DR-TDMA frame parameters. It should be noted that the only parameters that directly in uence the MAC protocol e ciency are: the frame duration, the number of control and data slots per frame and the data to control slot size ratio.... ..."

"... In PAGE 7: ... Table 1 shows the power consumed by each component assuming op- eration at 3 volts. Table 2 and Table3 show the timing pa- rameters and the energy of each operation during the TDMA frame. The active time of each TDMA slot, Tactive, is depen- dent on the total number of slots, Nslots, the maximum slots transmit time Tmax_payload, the AM synchronization setup Tsync_setup and capture Tsync as well as inter slot processing time TISS.... ..."

"... In PAGE 4: ...ig. 2. The vacuum chamber with the Californium-252 source placed above the chip with the lid removed 3 Results An overview of the results from the fault injections, from the two different clusters with four and five nodes, is presented in this section. An example of collected data is shown in Table1 and Table 2. Table 1 shows data logged by Node 2 during three TDMA rounds in the four-node set-up is shown in Table 1.... In PAGE 4: ... An example of collected data is shown in Table 1 and Table 2. Table 1 shows data logged by Node 2 during three TDMA rounds in the four-node set-up is shown in Table1 . The rows, contain CNI status register data where the columns represent information such as local membership vector (Memb), controller state (C-ST) as well as error diagnosis field (Diag), logged from several TDMA slots.... In PAGE 4: ... The rows, contain CNI status register data where the columns represent information such as local membership vector (Memb), controller state (C-ST) as well as error diagnosis field (Diag), logged from several TDMA slots. Table 2 shows the last two TDMA slots as shown in Table1 but logged by Node 1. In Table 1 and Table 2, Node 1 and Node 2 differ in their opinion about the last shown FI-node transmission.... In PAGE 4: ... Table 2 shows the last two TDMA slots as shown in Table 1 but logged by Node 1. In Table1 and Table 2, Node 1 and Node 2 differ in their opinion about the last shown FI-node transmission. This is a typical logged asymmetric fault.... In PAGE 5: ...Table 2. Status register information logged by Node 1 of the last two TDMA slots as logged by Node 2 in Table1 . In contrast to Node 2, Node 1 receives a correct frame (Diag = 0808) where 08 represents a correct frame Node 1 Sending node MembCTimeC-STStat -W2--W3- -W4- -W5-Diag-W2-Time d FI 000F 78F3 78380000000A0000FD0A500008081010 16 1 000F 82B6 82380000000A0000010A580018080000 0 3.... ..."

"... In PAGE 12: ... Accounting for the possibility that the receiver has drifted ahead or behind the transmitter, the transmitter has a guard time before sending and the receiver preamble-check has a guard time extending beyond the expected packet. Table3 in the next section shows the different timeout values that work well for our hardware configuration. Once the timeslot is complete, there needs to be an additional guard time before the next slot.... In PAGE 12: ... Table 2 shows the power consumed by each component assuming operation at 3 volts. Table3 and Table 4 show the timing parameters and the energy of each operation during the TDMA frame. The active time of each TDMA slot, Tactive, is dependent on the total number of slots, Nslots, the maximum slots transmit time Tmax_payload, the AM synchronization setup Tsync_setup and capture Tsync as well as inter slot processing time TISS.... ..."