Abstract. We study various generalizations of reversal-bounded multicounter machines and show that they have decidable emptiness, infiniteness, disjointness, containment, and equivalence problems. The extensions include allowing the machines to perform linear-relation tests among the counters

to be well-established. There are many automatic verification tools for their analysis which incorporate equivalence checking. Sound and complete equational theories exist for the various known equivalences, an elegant example is [18]. One may be led to wonder what the results will look like for infinite

to model e.g. link protocols such as the Alternating Bit Protocol and HDLC. The unboundedness of the channels makes these systems infinite-state. For this class of systems, we show that several interesting verification problems are decidable by giving algorithms for verifying the following classes

V R Pratt has shown that the real and integer feastbdlty of sets of linear mequallUes ofthe form x _< y + c can be decided quickly by examining the loops m certain graphs Pratt's method is generalized, first to real feaslbdlty of mequahues m two variables and arbitrary coefficients

This dissertation investigates and extends the mathematical foundations of logics and automata for the interleaving and synchronous noninterleaving view of system computations with an emphasis on decision procedures and relative expressive powers, and introduces extensions of these foundations to the emerging domain of noninterleaving asynchronous computations. System computations are described as occurrences of system actions, and tractable collections of such computations can be naturally represented by finite automata upon which one can do formal analysis. Specifications of system properties are usually described in formal logics, and the question whether the system at hand satisfies its specification is then solved by means of automata-theoretic constructions.

problem by translating GSM into a well-studied formal framework. We exploit this translation to isolate an interest-ing class of “state-bounded ” GSM models for which verification of sophisticated temporal properties is decidable. We then introduce some guidelines to turn an arbitrary GSM model into a

, the verification of non-terminating GOLOG programs is indeed de-cidable, which is achieved by means of three re-strictions. First, we use the ES variant of a de-cidable two-variable fragment of the Situation Cal-culus that was introduced by Gu and Soutchanski. Second, we have to restrict the GOLOG program

We present a decision method for automatic verification of a nontrivial class of systolic circuits. A formal model for systolic circuits, and a formal definition of systolic circuit verification are provided. Using this model, we give a decision method for verification of a class of circuits

are fairly common in applications, either because facts do not persist indefinitely or because one eventually forgets some facts, as one learns new ones. We discuss various ways of obtaining bounded action theories. The main result of the paper is that verification of an expressive class of first-order µ

1 Introduction Abstract State Machines. Abstract State Machines (ASMs) provide a formal method for transparent design and specification of complex dynamic systems. They combine advantages of informal methods (understandability, executability) with the advantages of formal methods (precision and applicability of mathematical methods and results). The executability of ASM-specifications yields the possibility to find already a part of the errors made in a specification via testing. However, the ASM-method is a formal method. There is a well defined semantics and this allows the application of mathematical methods to analyze ASMs. In particular, these are often results from mathematical logic as ASMs are based on first-order structures.