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Transactor-based Prototyping of Heterogeneous Multiprocessor System-On-Chip Architectures
"... www12.cs.fau.de We present the prototyping of a heterogeneous multiprocessor system-on-chip (MPSoC) design, which consists of general purpose RISC processors as well as novel accelerators in form of tightly-coupled processor arrays (TCPA). In general, TCPAs are well suited to accelerate numerous com ..."
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www12.cs.fau.de We present the prototyping of a heterogeneous multiprocessor system-on-chip (MPSoC) design, which consists of general purpose RISC processors as well as novel accelerators in form of tightly-coupled processor arrays (TCPA). In general, TCPAs are well suited to accelerate numerous
Automatic generation of application-specific architectures for heterogeneous multiprocessor system-on-chip
- Proc. of DAC 2001
, 2001
"... We present a design flow for the generation of application-specific multiprocessor architectures. In the flow, architectural parameters are first extracted from a high-level system specification. Parameters are used to instantiate architectural components, such as processors, memory modules and comm ..."
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Cited by 59 (12 self)
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We present a design flow for the generation of application-specific multiprocessor architectures. In the flow, architectural parameters are first extracted from a high-level system specification. Parameters are used to instantiate architectural components, such as processors, memory modules
Resource Manager for Non-preemptive Heterogeneous Multiprocessor System-on-chip
"... Increasingly more MPSoC platforms are being developed to meet the rising demands from concurrently executing applications. These systems are often heterogeneous with the use of dedicated IP blocks and application domain specific processors. While there is a host of research done to provide good perf ..."
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Cited by 9 (3 self)
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Increasingly more MPSoC platforms are being developed to meet the rising demands from concurrently executing applications. These systems are often heterogeneous with the use of dedicated IP blocks and application domain specific processors. While there is a host of research done to provide good
Application-Specific Multiprocessor . . .
"... It often happens that designers have to integrate different instruction-set processors on a single chip. Typical applications are wireless, image processing, xDSL, network and game processors. This paper deals with the three main problems that make the design of application-specific heterogeneous mu ..."
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Cited by 126 (5 self)
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multiprocessor Systems-on-Chip very hard and expensive: higher level specification; software support packages design; on-chip HW/SW communication design.
8.2 Automatic Scenario Detection for Improved WCET Estimation
"... Modern embedded applications usually have real-time constraints and they are implemented using heterogeneous multiprocessor systems-on-chip. Dimensioning a system requires accurate estimations of the worst-case execution time (WCET). Overestimation leads to over-dimensioning. This paper introduces a ..."
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Modern embedded applications usually have real-time constraints and they are implemented using heterogeneous multiprocessor systems-on-chip. Dimensioning a system requires accurate estimations of the worst-case execution time (WCET). Overestimation leads to over-dimensioning. This paper introduces
ABSTRACT Automatic Scenario Detection for Improved WCET Estimation
"... Modern embedded applications usually have real-time constraints and they are implemented using heterogeneous multiprocessor systems-on-chip. Dimensioning a system requires accurate estimations of the worst-case execution time (WCET). Overestimation leads to over-dimensioning. This paper introduces a ..."
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Modern embedded applications usually have real-time constraints and they are implemented using heterogeneous multiprocessor systems-on-chip. Dimensioning a system requires accurate estimations of the worst-case execution time (WCET). Overestimation leads to over-dimensioning. This paper introduces
SING: A Multiprocessor System-on-Chip Design and System Generation Tool
"... Increasingly complex embedded systems are being designed onto single chip systems that contain multiple parallel processing elements and memories. The design and implementation of these multiprocessor on-chip architectures is time consuming, delaying the time to market. Manual hardware design is als ..."
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is also error-prone, requiring careful verification and further delaying the time to market. In order to solve the aforementioned problems, an open source VHDL generation tool called SING was created to design and implement heterogeneous multiprocessor system-on-chip designs. The requirements for the tool
Hybrid dynamic energy and thermal management in heterogeneous embedded multiprocessor socs
- In Proceedings of the 2010 Asia and South Pacific Design Automation Conference, ASPDAC
, 2010
"... ABSTRACT- Heterogeneous multiprocessor system-on-chips (MPSoCs) which consist of cores with various power and performance characteristics can customize their configuration to achieve higher performance per Watt. On the other hand, inherent imbalance in power densities across MPSoCs leads to non-unif ..."
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Cited by 8 (3 self)
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ABSTRACT- Heterogeneous multiprocessor system-on-chips (MPSoCs) which consist of cores with various power and performance characteristics can customize their configuration to achieve higher performance per Watt. On the other hand, inherent imbalance in power densities across MPSoCs leads to non
Configuration and Programming of Heterogeneous Multiprocessors on a Multi-FPGA System Using TMDMPI
- In In the Proceedings of the 3rd International Conference on Reconfigurable Computing and FPGAs., San Luis Pototsi
, 2006
"... Recent research has shown that FPGAs have true potential to speedup demanding applications even further than what state-of-the art superscalar processors can do. The penalty is the loss of generality in the architecture, but reconfigurability of FPGAs allows them to be reprogrammed for other applica ..."
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Cited by 6 (2 self)
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Multiprocessor Systems-on-Chip on FPGAs. Hardware engines are also included into the multiprocessor system by using a message passing engine, which encapsulates the TMD-MPI functionality in hardware, to enable the communication between hardware engines and embedded processors. We test the functionality
Esl power and performance estimation for heterogeneous mpsocs using systemc
- In Forum on Specification and Design Languages (FDL
, 2011
"... In this paper, we propose a top-down power and performance estimation methodology for heterogeneous multiprocessor systems-on-chip. The proposed approach is applicable at the Electronic System Level (ESL). Thus, power and perfor-mance estimation can be applied in very early design phases. By strictl ..."
Abstract
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Cited by 6 (3 self)
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In this paper, we propose a top-down power and performance estimation methodology for heterogeneous multiprocessor systems-on-chip. The proposed approach is applicable at the Electronic System Level (ESL). Thus, power and perfor-mance estimation can be applied in very early design phases
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