Results 1 - 10 of 730

Hyper-acceleration and HW/SW

by S. Koerner
"... co-verification as an essential part of IBM eServer z900 verification Hardware/software (HW/SW) co-verification can considerably shorten the time required for system integration and bring-up. But coverification is limited by the simulation speed achievable whenever hardware models are required to ve ..."
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co-verification as an essential part of IBM eServer z900 verification Hardware/software (HW/SW) co-verification can considerably shorten the time required for system integration and bring-up. But coverification is limited by the simulation speed achievable whenever hardware models are required

Trade-Offs in HW/SW Codesign

by Wolfram Hardt, Raul Camposano , 1996
"... HW/SW codesign is becoming an increasingly more interesting research field because most practical systems consist of both HW and SW. In this paper we explore a bottom up HW/SW codesign strategy to investigate trade-offs in time behavior and area. A comparison of hardware and software implementations ..."
Abstract - Cited by 7 (0 self) - Add to MetaCart
HW/SW codesign is becoming an increasingly more interesting research field because most practical systems consist of both HW and SW. In this paper we explore a bottom up HW/SW codesign strategy to investigate trade-offs in time behavior and area. A comparison of hardware and software

HW–SW partitioning based on genetic algorithm

by Yi Zou, Zhenquan Zhuang, Huanhuan Chen - in: Proceedings of the CEC’04
"... Abstract-HW-SW partitioning is an important problem in HW-SW Codesign of embedded systems. We establish a HW-SW partitioning model based on system’s Basic Scheduling Block (BSB) graph and propose a Modified Genetic Partitioning Algorithm (MGPA). By adopting an adaptive fitness function definition an ..."
Abstract - Cited by 9 (0 self) - Add to MetaCart
Abstract-HW-SW partitioning is an important problem in HW-SW Codesign of embedded systems. We establish a HW-SW partitioning model based on system’s Basic Scheduling Block (BSB) graph and propose a Modified Genetic Partitioning Algorithm (MGPA). By adopting an adaptive fitness function definition

Properties Coverification for HW/SW Systems

by Mostafa Azizi, El Mostapha Aboulhamid, Sofiène Tahar - proceedings of the international conference of Parallel and Distributed Processing Techniques and Applications (PDPTA’99), Las Vegas , 1999
"... . The coverification of a given HW/SW system consists of checking whether the implementation of the software and hardware parts and their integration fulfill or not some or all the specification requirements of this system. In the case of a distributed model, the SW and HW system blocks are descr ..."
Abstract - Cited by 1 (0 self) - Add to MetaCart
. The coverification of a given HW/SW system consists of checking whether the implementation of the software and hardware parts and their integration fulfill or not some or all the specification requirements of this system. In the case of a distributed model, the SW and HW system blocks

HW/SW Communication Protocol Specifications

by Mattias O'Nils , 2001
"... We have separated the information required for HW/SW interface synthesis into three parts, the protocol specification, the operating system related information, and the processor related information. From these inputs a synthesis tool generates (a) device driver functions or (b) a combination of dev ..."
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We have separated the information required for HW/SW interface synthesis into three parts, the protocol specification, the operating system related information, and the processor related information. From these inputs a synthesis tool generates (a) device driver functions or (b) a combination

System Diagnostics in HW-SW Codesign

by Gy. Csertan
"... In this paper a novel approach is presented, which can successfully be used for the underlying hierarchical modeling of HW-SW codesign during the whole design cycle. This new method combines the conventional, performabilityevaluation oriented description of the functional units of the system with th ..."
Abstract - Cited by 1 (0 self) - Add to MetaCart
In this paper a novel approach is presented, which can successfully be used for the underlying hierarchical modeling of HW-SW codesign during the whole design cycle. This new method combines the conventional, performabilityevaluation oriented description of the functional units of the system

Large Exploration for HW/SW partitioning of Multirate

by And Aperiodic Real-Time, Abdenour Azzedine - Proceedings of the 10th International Symposium on Hardware/Software Codesign , 2002
"... This paper addresses the domain of fine and coarse grain HW / SW codesign for Real-Time System On-Chip. We propose a new method for the real-time scheduling and the HW / SW partitioning of multi-rate or aperiodic tasks. The large design space exploration is based on parallelism/delay trade-off curve ..."
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This paper addresses the domain of fine and coarse grain HW / SW codesign for Real-Time System On-Chip. We propose a new method for the real-time scheduling and the HW / SW partitioning of multi-rate or aperiodic tasks. The large design space exploration is based on parallelism/delay trade

Pipelined Interface for HW/SW-Codesign

by Wolfram Hardt, Andreas Günther, Raul Camposano , 1995
"... It has been pointed out that the efficiency of embedded systems is dramatically influenced by the interface between HW- and SW. Focussing on this part of codesign we developed a pipelined interface using the features of the target architecture. The interface allows handling of multiple HW-components ..."
Abstract - Cited by 4 (4 self) - Add to MetaCart
It has been pointed out that the efficiency of embedded systems is dramatically influenced by the interface between HW- and SW. Focussing on this part of codesign we developed a pipelined interface using the features of the target architecture. The interface allows handling of multiple HW

Hw/sw codesign techniques for dynamically reconfigurable architectures

by Juanjo Noguera, Rosa M. Badia - IEEE Transactions on Very Large Scale Integration Systems , 2002
"... figurable computing are commonly used methodologies for digital-systems design. However, no previous work has been carried out in order to define a HW/SW codesign methodology with dynamic scheduling for run-time reconfigurable architectures. In addition, all previous approaches to reconfigurable com ..."
Abstract - Cited by 19 (1 self) - Add to MetaCart
figurable computing are commonly used methodologies for digital-systems design. However, no previous work has been carried out in order to define a HW/SW codesign methodology with dynamic scheduling for run-time reconfigurable architectures. In addition, all previous approaches to reconfigurable

Very fast simulated annealing for HW-SW partitioning

by Sudarshan Banerjee, Nikil Dutt , 2004
"... Hardware/software (HW-SW) partitioning is a key problem in the codesign of embedded systems and has been studied extensively in the past. With the wide availability of commercial platforms such as the Virtex-II Pro series from Xilinx that integrate processors with reconfigurable logic, one major exi ..."
Abstract - Cited by 3 (1 self) - Add to MetaCart
Hardware/software (HW-SW) partitioning is a key problem in the codesign of embedded systems and has been studied extensively in the past. With the wide availability of commercial platforms such as the Virtex-II Pro series from Xilinx that integrate processors with reconfigurable logic, one major
Results 1 - 10 of 730